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NSB1706DMW5T1G

P1-P3
© Semiconductor Components Industries, LLC, 2016
January, 2016 − Rev. 6
1 Publication Order Number:
NSB1706DMW5T1/D
NSB1706DMW5T1G,
NSVB1706DMW5T1G
Dual Bias Resistor
Transistor
NPN Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
The Bias Resistor Transistor (BRT) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the NSB1706DMW5T1G,
two BRT devices are housed in the SC−88A package which is ideal for
low power surface mount applications where board space is at a
premium.
Features
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted, common for Q
1
and Q
2
)
Rating
Symbol Value Unit
Collector-Base Voltage V
CBO
50 Vdc
Collector-Emitter Voltage V
CEO
50 Vdc
Collector Current I
C
100 mAdc
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Symbol Max Unit
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
P
D
187 (Note 1)
256 (Note 2)
1.5 (Note 1)
2.0 (Note 2)
mW
mW/°C
Thermal Resistance, Junction-to-Ambient
R
q
JA
670 (Note 1)
490 (Note 2)
°C/W
Characteristic
(Both Junctions Heated)
Symbol Max Unit
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
P
D
250 (Note 1)
385 (Note 2)
2.0 (Note 1)
3.0 (Note 2)
mW
mW/°C
Thermal Resistance, Junction-to-Ambient
R
q
JA
493 (Note 1)
325 (Note 2)
°C/W
Thermal Resistance, Junction-to-Lead
R
q
JL
188 (Note 1)
208 (Note 2)
°C/W
Junction and Storage Temperature T
J
, T
stg
−55 to +150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 x 1.0 inch Pad.
SC−88A
CASE 419A
STYLE 1
U6 = Device Marking
M = Date Code
G = Pb−Free Package
MARKING DIAGRAM
(5) (4)
(3)(2)(1)
Q1Q1 Q2
www.onsemi.com
Device Package Shipping
†
ORDERING INFORMATION
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
R1
R2 R2
R1
U6 M G
G
(Note: Microdot may be in either location)
NSB1706DMW5T1G SC−88A
(Pb−Free)
3000 /
Tape & Reel
1
1
NSVB1706DMW5T1G SC−88A
(Pb−Free)
3000 /
Tape & Reel
NSB1706DMW5T1G, NSVB1706DMW5T1G
www.onsemi.com
2
ELECTRICAL CHARACTERISTICS (T
A
= 25°C unless otherwise noted, common for Q
1
and Q
2
)
Characteristic
Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Collector-Base Cutoff Current
(V
CB
= 50 V, I
E
= 0)
I
CBO
− − 100 nAdc
Collector-Emitter Cutoff Current
(V
CE
= 50 V, I
B
= 0)
I
CEO
− − 500 nAdc
Emitter-Base Cutoff Current
(V
EB
= 6.0 V, I
C
= 0)
I
EBO
− − 0.18 mAdc
Collector-Base Breakdown Voltage
(I
C
= 10 mA, I
E
= 0)
V
(BR)CBO
50 − − Vdc
Collector-Emitter Breakdown Voltage (Note 3)
(I
C
= 2.0 mA, I
B
= 0)
V
(BR)CEO
50 − − Vdc
ON CHARACTERISTICS (Note 3)
DC Current Gain
(V
CE
= 10 V, I
C
= 5.0 mA)
h
FE
80 200 −
Collector-Emitter Saturation Voltage
(I
C
= 10 mA, I
B
= 1 mA)
V
CE(sat)
− − 0.25 Vdc
Input Voltage (off)
(V
CE
= 5.0 V, I
C
= 100 mA)
V
i(off)
− 0.6 0.5
Vdc
Input Voltage (on)
(V
CE
= 0.3 V, I
C
= 5 mA)
V
i(on)
1.3 0.9 −
Vdc
Output Voltage (on)
(V
CC
= 5.0 V, V
B
= 2.5 V, R
L
= 1.0 kW)
V
OL
− − 0.2
Vdc
Output Voltage (off)
(V
CC
= 5.0 V, V
B
= 0.25 V, R
L
= 1.0 kW)
V
OH
4.9 − − Vdc
Input Resistor R1 3.3 4.7 6.1
kW
Resistor Ratio R1/R2 0.055 0.1 0.185
NOTE: New resistor combinations. Updated curves to follow in subsequent data sheets.
3. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%.
Figure 1. Derating Curve
300
200
150
100
50
0
−50 0 50 100 150
T
A
, AMBIENT TEMPERATURE (°C)
R
q
JA
= 833°C/W
250
P
D
, POWER DISSIPATION (mW)
NSB1706DMW5T1G, NSVB1706DMW5T1G
www.onsemi.com
3
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
DIM
A
MIN MAX MIN MAX
MILLIMETERS
1.80 2.200.071 0.087
INCHES
B 1.15 1.350.045 0.053
C 0.80 1.100.031 0.043
D 0.10 0.300.004 0.012
G 0.65 BSC0.026 BSC
H --- 0.10---0.004
J 0.10 0.250.004 0.010
K 0.10 0.300.004 0.012
N 0.20 REF0.008 REF
S 2.00 2.200.079 0.087
STYLE 1:
PIN 1. BASE
2. EMITTER
3. BASE
4. COLLECTOR
5. COLLECTOR
B0.2 (0.008)
MM
12 3
45
A
G
S
D 5 PL
H
C
N
J
K
−B−
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE K
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
ǒ
mm
inches
Ǔ
SCALE 20:1
0.65
0.025
0.65
0.025
0.50
0.0197
0.40
0.0157
1.9
0.0748
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
NSB1706DMW5T1/D
P
UBLICATION ORDERING INFORMATION
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USA/Canada
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Phone: 421 33 790 2910
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Phone: 81−3−5817−1050
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Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your loc
al
Sales Representative
P1-P3

NSB1706DMW5T1G

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Manufacturer:
ON Semiconductor
Description:
Bipolar Transistors - Pre-Biased 100mA 50V BRT NPN
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New from this manufacturer.
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