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EVAL-ADV7513-ABZ

P1-P3P4-P6P7-P9P10-P12P13-P13
Data Sheet ADV7513
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
Table 1.
Parameter Symbol Temp
Test
Level
1
Min Typ Max Unit
DIGITAL INPUTS
Data Inputs, Video and Audio, CEC_CLK
Input Voltage, High
V
IH
Full
VI
V
Input Voltage, Low V
IL
Full VI −0.3 +0.7 V
Input Capacitance 25°C VIII 1.0 1.5 pF
CEC_CLK Frequency
2
Full VIII 3 12 100 MHz
CEC_CLK Accuracy Full VIII −2 +2 %
DDC I
2
C Lines (DDCSDA, DDCSCL)
Input Voltage, High V
IH
Full IV 1.4 5.5 V
Input Voltage, Low V
IL
Full IV −0.3 +0.7 V
I
2
C Lines (SDA, SCL)
Input Voltage, High V
IH
Full VI 1.4 5.5 V
Input Voltage, Low V
IL
Full VI −0.3 +0.7 V
CEC Pin
Input Voltage, High V
IH
Full VI 2.0 5.5 V
Input Voltage, Low V
IL
Full VI −0.3 +0.8 V
Output Voltage, High V
OH
Full VI 2.5 3.63 V
Output Voltage, Low V
OL
Full VI −0.3 +0.6 V
HPD Pin
Input Voltage, High V
IH
Full VI 1.3 5.5 V
Input Voltage, Low V
IL
Full VI −0.3 +0.8 V
THERMAL CHARACTERISTICS
Thermal Resistance
Junction-to-Case θ
JC
Full V 20 °C/W
Junction-to-Ambient θ
JA
Full V 43 °C/W
Ambient Temperature Full V −25 +25 +85 °C
DC SPECIFICATIONS
Input Leakage Current I
IL
25°C VI −1 +1 µA
POWER SUPPLY
1.8 V Supply Voltage (DVDD, AVDD,
PVDD, BGVDD)
Full IV 1.71 1.8 1.90 V
3.3 V Supply Voltage (DVDD_3V) Full IV 3.15 3.3 3.45 V
Power-Down Current 25°C IV 300 µA
Transmitter Total Power
3
At 1.8 V Full VI 256 mW
At 3.3 V Full VI 1 mW
AC SPECIFICATIONS
TMDS Output Clock Frequency 25°C IV 20 165 MHz
TMDS Output Clock Duty Cycle 25°C IV 48 52 %
Input Video Clock Frequency Full IV 165 MHz
Input Video Data Setup Time
4
t
VSU
Full IV 1.8 ns
Input Video Data Hold Time
4
t
VHLD
Full
IV
ns
TMDS Differential Swing 25°C VII 800 1100 1200 mV
Differential Output Timing
Low-to-High Transition Time 25°C VII 75 95 ps
High-to-Low Transition Time 25°C VII 75 95 ps
VSYNC and HSYNC Delay
From DE Falling Edge 25°C IV 1 UI
5
Rev. B | Page 3 of 12
ADV7513 Data Sheet
Parameter Symbol Temp
Test
Level
1
Min Typ Max Unit
To DE Rising Edge 25°C IV 1 UI
5
AUDIO AC TIMING
SCLK Duty Cycle
N/2 Is an Even Number Full IV 40 50 60 %
N/2 Is an Odd Number Full IV 49 50 51 %
I2S[3:0], S/PDIF Setup Time t
ASU
Full IV 2 ns
I2S[3:0], S/PDIF Hold Time t
AHLD
Full IV 2 ns
LRCLK Setup Time t
ASU
Full IV 2 ns
LRCLK Hold Time t
AHLD
Full IV 2 ns
I
2
C INTERFACE
SCL Clock Frequency Full 400 kHz
SDA Setup Time t
DSU
Full 100 ns
SDA Hold Time t
DHO
Full 100 ns
Setup Time for Start Condition t
STASU
Full 0.6 µs
Hold Time for Start Condition
t
STAH
Full
µs
Setup Time for Stop Condition t
STOSU
Full 0.6 µs
1
See the Explanation of Test Levels section.
2
12 MHz crystal oscillator for default register settings.
3
1080p, 24-bit typical random pattern.
4
The video data setup and hold times are measured at 0.9 V. The relationship between the clock and data is programmable in 400 ps steps.
5
UI is the unit interval.
Rev. B | Page 4 of 12
Data Sheet ADV7513
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Digital Inputs (SDA, SCL, DDCSDA, DDCSCL,
HPD, PD)
−0.3 V to +5.5 V
Audio/Video Digital Inputs (D[23:0], MCLK,
CLK, LRCLK, CEC, CEC_CLK, SPDIF, I2S[3:0],
SCLK, HSYNC, DE, VSYNC)
−0.3 V to +3.63 V
Digital Output Current 20 mA
Operating Temperature Range −40°C to +100°C
Storage Temperature Range
−65°C to +150°C
Maximum Junction Temperature 150°C
Maximum Case Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
EXPLANATION OF TEST LEVELS
I. 100% production tested.
II. 100% production tested at 25°C and sample tested at
specified temperatures.
III. Sample tested only.
I V. Parameter is guaranteed by design and characterization
testing.
V. Parameter is a typical value only.
VI. 100% production tested at 25°C; guaranteed by design
and characterization testing.
VII. Limits defined by HDMI specification; guaranteed by
design and characterization testing.
VIII. Parameter is guaranteed by design.
ESD CAUTION
Rev. B | Page 5 of 12
P1-P3P4-P6P7-P9P10-P12P13-P13

EVAL-ADV7513-ABZ

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Analog Devices Inc.
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BOARD EVAL FOR ADV7513
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