NBSG16VS
http://onsemi.com
8
Table 8. AC CHARACTERISTICS for FCBGA−16 V
CC
= 0 V; V
EE
= −3.465 V to −3.0 V or V
CC
= 3.0 V to 3.465 V; V
EE
= 0 V
Symbol Characteristic
−40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
f
max
Maximum Frequency
(See Figure 8) (Note 26)
10.7
(Note 29)
12 10.7
(Note 29)
12 10.7
(Note 29)
12 GHz
t
PLH
,
t
PHL
Propagation Delay to Output Differen-
tial
(V
CTRL
= V
CC
− 2 V) D → Q, Q
(V
CTRL
= V
CC
− 1 V) D → Q, Q
100
100
125
120
145
140
100
100
125
120
145
140
100
100
125
120
145
140
ps
t
SKEW
Duty Cycle Skew (Note 27) 3 10 3 10 3 10 ps
t
JITTER
RMS Random Clock Jitter
f
in
< 10 GHz
Peak−to−Peak Data Dependent Jitter
f
in
< 10 Gb/s
0.8
TBD
2 0.8
TBD
2 0.8
TBD
2
ps
V
INPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 28)
75 2600 75 2600 75 2600 mV
t
r
t
f
Output Rise/Fall Times (20% − 80%)
@ 1 GHz
(V
CTRL
= V
CC
− 2 V) Q, Q
(V
CTRL
= V
CC
− 1 V) Q, Q
30
30
45
40
55
50
30
30
45
40
55
50
30
30
45
40
55
50
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
26.Measured using a 500 mV source, 50% duty cycle clock source. All loading with 50 to V
CC
−2.0 V. Input edge rates 40 ps (20% − 80%).
27.t
SKEW
= |t
PLH
−t
PHL
| for a nominal 50% differential clock input waveform. See Figure 10.
28.V
INPP(MAX)
cannot exceed V
CC
− V
EE
(applicable only when V
CC
− V
EE
t 2600 mV).
29.Conditions include input amplitude of 500 mV and V
CTRL
= V
CC
− 2 V. Minimum output amplitude guarantee of 100 mV (see Output P−P
Spec in Figure 8).
Table 9. AC CHARACTERISTICS for FCBGA−16 V
CC
= 0 V; −3.0 V tV
EE
v −2.375 V or 2.375 V v V
CC
t 3.0 V; V
EE
= 0 V
Symbol
Characteristic
−40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
f
max
Maximum Frequency
(See Figure 9) (Note 30)
10.7
(Note 33)
12 10.7
(Note 33)
12 10.7
(Note 33)
12 GHz
t
PLH
,
t
PHL
Propagation Delay to Output Differen-
tial
(V
CTRL
= V
CC
− 2 V) D → Q, Q
(V
CTRL
= V
CC
− 1 V) D → Q, Q
100
100
125
120
145
140
100
100
125
120
145
140
100
100
125
120
145
140
ps
t
SKEW
Duty Cycle Skew (Note 31) 3 10 3 10 3 10 ps
t
JITTER
RMS Random Clock Jitter
f
in
< 10 GHz
Peak−to−Peak Data Dependent Jitter
f
in
< 10 Gb/s
0.9
TBD
3 0.9
TBD
3 0.9
TBD
3
ps
V
INPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 32)
75 2600 75 2600 75 2600 mV
t
r
t
f
Output Rise/Fall Times (20% − 80%)
@ 1 GHz
(V
CTRL
= V
CC
− 2 V) Q, Q
(V
CTRL
= V
CC
− 1 V) Q, Q
25
22
50
45
70
60
25
22
50
45
70
60
25
22
50
45
70
60
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
30.Measured using a 500 mV source, 50% duty cycle clock source. All loading with 50 to V
CC
−2.0 V. Input edge rates 40 ps (20% − 80%).
31.t
SKEW
= |t
PLH
−t
PHL
| for a nominal 50% differential clock input waveform. See Figure 10.
32.V
INPP(MAX)
cannot exceed V
CC
− V
EE
(applicable only when V
CC
− V
EE
t 2600 mV).
33.Conditions include input amplitude of 500 mV and V
CTRL
= V
CC
− 2 V. Minimum output amplitude guarantee of 100 mV (see Output P−P
Spec in Figure 9).
