© 2002 Fairchild Semiconductor Corporation DS005946 www.fairchildsemi.com
October 1987
Revised March 2002
CD4013BC Dual D-Type Flip-Flop
CD4013BC
Dual D-Type Flip-Flop
General Description
The CD4013B dual D-type flip-flop is a monolithic comple-
mentary MOS (CMOS) integrated circuit constructed with
N- and P-channel enhancement mode transistors. Each
flip-flop has independent data, set, reset, and clock inputs
and “Q” and “Q
” outputs. These devices can be used for
shift register applications, and by connecting “Q
” output to
the data input, for counter and toggle applications. The
logic level present at the “D” input is transferred to the Q
output during the positive-going transition of the clock
pulse. Setting or resetting is independent of the clock and
is accomplished by a high level on the set or reset line
respectively.
Features
■ Wide supply voltage range: 3.0V to 15V
■ High noise immunity: 0.45 V
DD
(typ.)
■ Low power TTL: fan out of 2 driving 74L
compatibility: or 1 driving 74LS
Applications
• Automotive
• Data terminals
• Instrumentation
• Medical electronics
• Alarm system
• Industrial electronics
• Remote metering
• Computers
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Top View
Truth Table
No Change
x = Don't Care Case
Note 1: Level Change
Order Number Package Number Package Description
CD4013BCM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
CD4013BCSJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4013BCN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
CL
(Note 1)
DRSQQ
00001
10010
x00QQ
x x1001
x x0110
x x1111