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8430BY-71LF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
8430B-71 Data Sheet
©2015 Integrated Device Technology, Inc November 30, 20154
TABLE 3B. PROGRAMMABLE VCO FREQUENCY FUNCTION TABLE (NOTE 1)
TABLE 3A. PARALLEL AND SERIAL MODE FUNCTION TABLE
VCO Frequency
(MHz)
M Divide
2561286432168421
M8 M7 M6 M5 M4 M3 M2 M1 M0
250 125 001111101
252 126 001111110
254 127 001111111
256 128 010000000
• • •••••••••
• • •••••••••
696 348 101011100
698 349 101011101
700 350 101011110
NOTE 1: These M divide values and the resulting frequencies correspond to crystal or TEST_CLK input frequency of 16MHz.
TABLE 3C. PROGRAMMABLE OUTPUT DIVIDER FUNCTION TABLE
Inputs
N Divider Value
FOUT0, nFOUT0 Output Frequency
(MHz)
N2 N1 N0 Minimum Maximum
0 0 0 2 125 350
0 0 1 4 62.5 175
0 1 0 8 31.25 87.5
0 1 1 16 15.625 43.75
1 0 0 1 250 700
1 0 1 2 125 350
1 1 0 4 62.5 175
1 1 1 8 31.25 87.5
Inputs
Conditions
MR nP_LOAD M N S_LOAD S_CLOCK S_DATA
H X X X X X X Reset. Forces outputs LOW.
L L Data Data X X X
Data on M and N inputs passed directly to the M divider
and N output divider. TEST output forced LOW.
L
↑
Data Data L X X
Data is latched into input registers and remains loaded
until next LOW transition or until a serial event occurs.
LH XXL
↑
Data
Serial input mode. Shift register is loaded with data on
S_DATA on each rising edge of S_CLOCK.
LH XX ↑ L Data
Contents of the shift register are passed to the
M divider and N output divider.
LH XX
↓
L Data M divider and N output divider values are latched.
L H X X L X X Parallel or serial input do not affect shift registers.
LH XXH
↑
Data S_DATA passed directly to M divider as it is clocked.
NOTE: L = LOW
H = HIGH
X = Don’t care
↑ = Rising edge transition
↓ = Falling edge transition
8430B-71 Data Sheet
©2015 Integrated Device Technology, Inc November 30, 20155
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, V
CC
= V
CCA
= V
CCO
= 3.3V±5%, TA = 0°C TO 70°C
TABLE 4B. LVCMOS/LVTTL DC CHARACTERISTICS, V
CC
= V
CCA
= V
CCO
= 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
CC
Core Supply Voltage 3.135 3.3 3.465 V
V
CCA
Analog Supply Voltage 3.135 3.3 3.465 V
V
CCO
Output Supply Voltage 3.135 3.3 3.465 V
I
EE
Power Supply Current 140 mA
I
CCA
Analog Supply Current 15 mA
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifi cations only. Functional
operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
CC
4.6V
Inputs, V
I
-0.5V to V
CC
+ 0.5V
Outputs, I
O
Continuous Current 50mA
Surge Current 100mA
Package Thermal Impedance, θ
JA
47.9°C/W (0 lfpm)
Storage Temperature, T
STG
-65°C to 150°C
TABLE 4C. LVPECL DC CHARACTERISTICS, V
CC
= V
CCA
= V
CCO
= 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OH
Output High Voltage; NOTE 1 V
CC
- 1.4 V
CC
- 0.9 V
V
OL
Output Low Voltage; NOTE 1 V
CC
- 2.0 V
CC
- 1.7 V
V
SWING
Peak-to-Peak Output Voltage Swing 0.6 1.0 V
NOTE 1: Outputs terminated with 50W to V
CCO
- 2V. See “Parameter Measurement Information” section,
“3.3V Output Load Test Circuit” fi gure.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input
High Voltage
TEST_CLK; NOTE 1 2.35 V
CC
+ 0.3 V
VCO_SEL, S_LOAD, S_DATA,
S_CLOCK, nP_LOAD, MR,
M0:M8, N0:N2, XTAL_SEL
2V
CC
+ 0.3 V
V
IL
Input Low Voltage -0.3 0.8 V
I
IH
Input
High Current
M0-M7, N0, N1, MR, nP_LOAD,
S_CLOCK, S_DATA, S_LOAD
V
CC
= V
IN
= 3.465V 150 µA
M8, N2, XTAL_SEL, VCO_SEL V
CC
= V
IN
= 3.465V 5 µA
TEST_CLK V
CC
= V
IN
= 3.465V 200 µA
I
IL
Input
Low Current
M0-M7, N0, N1, MR, nP_LOAD,
S_CLOCK, S_DATA, S_LOAD
V
CC
= 3.465V,
V
IN
= 0V
-5 µA
TEST_CLK, M8, N2, XTAL_SEL,
VCO_SEL
V
CC
= 3.465V,
V
IN
= 0V
-150 µA
V
OH
Output
High Voltage
TEST; NOTE 2 2.6 V
V
OL
Output
Low Voltage
TEST; NOTE 2 0.5 V
NOTE 1: Characterized with 1ns input edge rate.
NOTE 2: Outputs terminated with 50Ω to V
CCO
/2.
8430B-71 Data Sheet
©2015 Integrated Device Technology, Inc November 30, 20156
TABLE 7. AC CHARACTERISTICS, V
CC
= V
CCA
= V
CCO
= 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
F
MAX
Output Frequency 700 MHz
tjit(cc) Cycle-to-Cycle Jitter; NOTE 1, 3
fOUT > 87.5MHz 25 ps
fOUT ≤ 87.5MHz
45 ps
tjit(per) Period Jitter, RMS; NOTE 1 9 ps
tsk(o) Output Skew; NOTE 2, 3 15 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 200 700 ps
t
S
Setup Time
M, N to nP_LOAD 5 ns
S_DATA to S_CLOCK 5 ns
S_CLOCK to S_LOAD 5 ns
t
H
Hold Time
M, N to nP_LOAD 5 ns
S_DATA to S_CLOCK 5 ns
S_CLOCK to S_LOAD 5 ns
odc Output Duty Cycle
N ≠ div-by-1 48 52 %
N = div-by-1, fOUT ≤ 400MHz 45 55 %
N = div-by-1,
400MHz < fOUT 630MHz
40 60 %
t
LOCK
PLL Lock Time 1ms
See Parameter Measurement Information section.
NOTE 1: Jitter performance using XTAL inputs.
NOTE 2: Defi ned as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: This parameter is defi ned in accordance with JEDEC Standard 65.
TABLE 5. INPUT CHARACTERISTICS, V
CC
= V
CCA
= V
CCO
= 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
IN
Input Frequency
TEST_CLK; NOTE 1 12 27 MHz
XTAL_IN, XTAL_OUT;
NOTE 1
12 27 MHz
S_CLOCK 50 MHz
t
r_input
Input Rise Time TEST_CLK 5 ns
NOTE 1: For the input crystal and reference frequency range, the M value must be set for the VCO to operate within the
250MHz to 700MHz range. Using the minimum input frequency of 12MHz, valid values of M are 167 ≤ M ≤ 466.
Using the maximum frequency of 27MHz, valid values of M are 75 ≤ M ≤ 207.
TABLE 6. CRYSTAL CHARACTERISTICS
Parameter Test Conditions Minimum Typical Maximum Units
Mode of Oscillation Fundamental
Frequency 12 27 MHz
Equivalent Series Resistance (ESR) 50
Ω
Shunt Capacitance 7pF
Drive Level 1mW
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

8430BY-71LF

Mfr. #:
Buy 8430BY-71LF
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner 2 LVPECL OUT SYNTHESIZER
Lifecycle:
New from this manufacturer.
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