IDT
®
12-Output Differential Z-buffer for PCIe Gen2/3 and QPI 1682D- 11/19/15
9ZX21201
12-Output Differential Z-buffer for PCIe Gen2/3 and QPI
11
SMBusTable: PLL Mode, and Frequency Select Register
Pin # Name Control Function T
e 0 1 Default
Bit 7
PLL Mode 1 PLL O
eratin
Mode Rd back 1
R
Latch
Bit 6
PLL Mode 0 PLL O
eratin
Mode Rd back 0
R
Latch
Bit 5
0
Bit 4
0
Bit 3 PLL_SW_EN Enable S/W control of PLL B
RW HW Latch S/W Control 0
Bit 2 PLL Mode 1 PLL O
eratin
Mode 1 RW 1
Bit 1 PLL Mode 0 PLL O
eratin
Mode 1 RW 1
Bit 0
100M_133M# Fre
uenc
Select Readback
R
133MHz 100MHz
Latch
SMBusTable: Output Control Register
Pin # Name Control Function T
e 0 1 Default
Bit 7
DIF_7_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 6
DIF_6_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 5
DIF_5_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 4
DIF_4_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 3
DIF_3_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 2
DIF_2_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 1
DIF_1_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 0
DIF_0_En Out
ut Control - '0' overrides OE#
in RW 1
SMBusTable: Output Control Register
Pin # Name Control Function T
e 0 1 Default
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
DIF_11_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 2
DIF_10_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 1
DIF_9_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 0
DIF_8_En Out
ut Control - '0' overrides OE#
in RW 1
SMBusTable: Reserved Register
Pin # Name Control Function T
e 0 1 Default
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
See PLL Operating Mode
Readback Table
See PLL Operating Mode
Readback Table
Low/Low Enable
30/31
B
te 3
50/51
59/60
54/55
B
te 2
B
te 0
5
5
4
These bits
available in B
rev onl
.
B
te 1
47/46
64/63
26/27
21/22
17/18
43/42
39/38
35/34
Low/Low Enable
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved