LT3791-1
21
37911fa
For more information www.linear.com/LT3791-1
Efficiency Considerations
The power efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Although all dissipative
elements in circuits produce losses, four main sources
account for most of the losses in LT3791-1 circuits:
1. DC I
2
R losses. These arise from the resistances of the
MOSFETs, sensing resistor, inductor and PC board
traces and cause the efficiency to drop at high output
currents.
2. Transition loss. This loss arises from the brief amount
of time switch M1 or switch M3 spends in the saturated
region during switch node transitions. It depends upon
the input voltage, load current, driver strength and
MOSFET capacitance, among other factors. The loss
is significant at input voltages above 20V and can be
estimated from:
Transition Loss ≈ 2.7 • V
IN
2
• I
OUT
• C
RSS
• f
where C
RSS
is the reverse-transfer capacitance.
3. INTV
CC
current. This is the sum of the MOSFET driver
and control currents.
4. C
IN
and C
OUT
loss. The input capacitor has the difficult
job of filtering the large RMS input current to the regu-
lator
in buck operation. The output capacitor has the
difficult
job of filtering the large RMS output current
in boost operation. Both C
IN
and C
OUT
are required to
have low ESR to minimize the AC I
2
R loss and sufficient
capacitance to prevent the RMS current from causing
additional upstream losses in fuses or batteries.
5. Other losses. Schottky diode D3 and D4 are respon
-
sible for conduction losses during dead time and light
load
conduction periods. Inductor core loss occurs
predominately at light loads. Switch M3 causes reverse
recovery current loss in boost operation.
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If you
make a change and the input current decreases, then the
efficiency has increased. If there is no change in the input
current, then there is no change in efficiency.
PC Board Layout Checklist
The basic PC board layout requires a dedicated ground
plane layer. Also, for high current, a multilayer board
provides heat sinking for power components.
n
The PGND ground plane layer should not have any traces
and it should be as close as possible to the layer with
power MOSFETs.
n
Place C
IN
, switch M1, switch M2 and D1 in one compact
area. Place C
OUT
, switch M3, switch M4 and D2 in one
compact area.
n
Use immediate vias to connect the components (in-
cluding the LT3791-1’s SGND and PGND pins) to the
ground
plane. Use several large vias for each power
component.
n
Use planes for V
IN
and V
OUT
to maintain good voltage
filtering and to keep power losses low.
n
Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. Connect the copper areas to any DC net
(V
IN
or PGND).
n
Separate the signal and power grounds. All small-signal
components should return to the SGND pin at one point,
which is then tied to the PGND pin close to the sources
of switch M2 and switch M3.
n
Place switch M2 and switch M3 as close to the control-
ler as possible, keeping the PGND, BG and SW traces
short.
n
Keep the high dV/dT SW1, SW2, BST1, BST2, TG1 and
TG2 nodes away from sensitive small-signal nodes.
applicaTions inForMaTion
