HMC8121 Data Sheet
Rev. B | Page 12 of 16
THEORY OF OPERATION
The circuit architecture of the HMC8121 variable gain amplifier
is shown in Figure 37. The HMC8121 uses multiple gain stages
and staggered voltage variable attenuation stages to form a low
noise, high linearity variable gain amplifier with a gain range of
~17 dB. The first stage is a low noise preamp, which is followed
by the first voltage variable attenuator in the signal path. A
portion of the signal is coupled away and further amplified
before driving an on-chip envelope detector. The envelope
detector provides an output that is proportional to the peak
envelope power of the incoming signal. After the first
attenuator, a second stage amplifier provides additional gain
and isolation before driving the second variable attenuator
block. Three cascaded gain stages follow the second variable
attenuator. At the output of the last stage, another coupler taps
off a small portion of the output signal. The coupled signal is
presented to an on-chip diode detector for external monitoring
of the output power. A matched reference diode is included to
help correct for detector temperature dependencies. See the
application circuit in Figure 38 for further details on biasing the
different blocks and utilizing the detector features.
RFIN RFOUT
ENV
DET
ENV
DET
V
CTL1
V
CTL2
V
REF
V
DET
13154-034
Figure 37. Variable Gain Amplifier Circuit Architecture