74ABT16501CSSC

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74ABT16501
DC Electrical Characteristics
Note 7: Max number of outputs defined as (n). n 1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.
Note 8: Max number of outputs defined as (n). n 1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.
Note 9: Max number of data inputs (n) switching. n 1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (V
ILD
), 0V to threshold (V
IHD
).
Guaranteed, but not tested.
AC Electrical Characteristics
AC Operating Requirements
Symbol Parameter Min Typ Max Units
V
CC
Conditions
C
L
= 50 pF; R
L
= 500
V
OLP
Quiet Output Maximum Dynamic V
OL
0.7 1.2 V 5.0 T
A
= 25°C (Note 7)
V
OLV
Quiet Output Minimum Dynamic V
OL
1.5 1.0 V 5.0 T
A
= 25°C (Note 7)
V
OHV
Minimum HIGH Level Dynamic Output Voltage 2.5 3.0 V 5.0 T
A
= 25°C (Note 8)
V
IHD
Minimum HIGH Level Dynamic Input Voltage 2.2 1.8 V 5.0 T
A
= 25°C (Note 9)
V
ILD
Maximum LOW Level Dynamic Input Voltage 1.2 0.8 V 5.0 T
A
= 25°C (Note 9)
Symbol Parameter
T
A
= +25°CT
A
= 40°C to +85°C
Units
V
CC
= +5V V
CC
= 4.5V–5.5V
C
L
= 50 pF C
L
= 50 pF
Min Typ Max Min Max
f
max
Maximum Clock Frequency 150 200 150 MHz
t
PLH
Propagation Delay 1.0 2.7 4.6 1.0 4.6 ns
t
PHL
A or B to B or A 1.0 3.2 4.6 1.0 4.6
t
PLH
Propagation Delay 1.0 3.1 5.0 1.0 5.0 ns
t
PHL
LEAB or LEBA to B or A 1.0 3.6 5.5 1.0 5.5
t
PLH
Propagation Delay 1.0 3.4 5.3 1.0 5.3 ns
t
PHL
CLKAB or CLKBA to B or A 1.0 3.7 5.3 1.0 5.3
t
PZH
Propagation Delay 1.5 2.7 5.6 1.5 5.6 ns
t
PZL
OEAB or OEBA to B or A
1.5 3.0 5.6 1.5 5.6
t
PHZ
Propagation Delay 1.5 3.7 6.0 1.5 6.0 ns
t
PLZ
OEAB or OEBA to B or A
1.5 3.2 6.0 1.5 6.0
Symbol Parameter
T
A
= +25°CT
A
= 40°C to +85°C
Units
V
CC
= +5V V
CC
= 4.5V–5.5V
C
L
= 50 pF C
L
= 50 pF
Min Max Min Max
t
S
(H) Setup Time, 4.0 4.0 ns
t
S
(L) A to CLKAB, B to CLKBA 4.0 4.0
t
H
(H) Hold Time, 0 0 ns
t
H
(L) A to CLKAB, B to CLKBA 0 0
t
S
(H) Setup Time, A to LEAB 4.0 4.0 ns
t
S
(L)
or B to LEBA, CLK HIGH
4.0 4.0
t
H
(H) Hold Time, A to LEAB 1.5 1.5 ns
t
H
(L)
or B to LEBA, CLK HIGH
1.5 1.5
t
S
(H) Setup Time, A to LEAB 1.5 1.5 ns
t
s
(L)
or B to LEBA, CLK LOW
1.5 1.5
t
H
(H) Hold Time, A to LEAB 1.5 1.5
ns
t
H
(L)
or B to LEBA, CLK LOW
1.5 1.5
t
W
(H) Pulse Width, 3.3 3.3 ns
t
W
(L) LEAB or LEBA, HIGH 3.3 3.3
t
W
(H) Pulse Width, CLKAB 3.3 3.3 ns
t
W
(L) or CLKBA, HIGH or LOW 3.3 3.3
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74ABT16501
Capacitance
Note 10: C
I/O
is measured at frequency f = 1 MHz per MIL-STD-883, Method 3012.
AC Loading
*Includes jig and probe capacitance.
FIGURE 1. Standard AC Test Load
FIGURE 2. V
M
= 1.5V
Input Pulse Requirements
FIGURE 3. Test Input Signal Requirements
AC Waveforms
FIGURE 4. Propagation Delay Waveforms
for Inverting and Non-Inverting Functions
FIGURE 5. Propagation Delay,
Pulse Width Waveforms
FIGURE 6. 3-STATE Output HIGH
and LOW Enable and Disable Times
FIGURE 7. Setup Time, Hold Time
and Recovery Time Waveforms
Symbol Parameter Typ Units
Conditions
T
A
= 25°C
C
IN
Input Capacitance 5.0 pF V
CC
= 0.0V
C
I/O
(Note 10) Output Capacitance 11.0 pF V
CC
= 5.0V
Amplitude Rep. Rate t
W
t
r
t
f
3.0V 1 MHz 500 ns 2.5 ns 2.5 ns
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74ABT16501
Physical Dimensions inches (millimeters) unless otherwise noted
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
Package Number MS56A

74ABT16501CSSC

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
Bus Transceivers 18-Bit Univ Bus Tran
Lifecycle:
New from this manufacturer.
Delivery:
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