LTC1566-1IS8#TRPBF

LTC1566-1
4
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PI FU CTIO S
IN
+
, IN
(Pins 1, 2): Input Pins. Signals can be applied to
either or both input pins. The DC gain from differential
inputs (Pin 1 to Pin 2) to the differential outputs (Pin 8 to
Pin 7) is 4V/V. The input range is described in the Applica-
tions Information section.
GND (Pin 3): Ground. The ground pin is the reference
voltage for the filter. This is a high impedance input, which
requires an external biasing network. Biasing GND to
one-half the total power supply voltage of the filter maxi-
mizes the dynamic range. For single supply operation the
ground pin should be bypassed with a quality 0.1µF
ceramic capacitor to Pin 4. For dual supply operation,
connect Pin 3 to a high quality DC ground. A ground plane
should be used. A poor ground will increase noise and
distortion. Pin 3 also serves as the DC reference voltage for
Pin 7.
V
, V
+
(Pins 4, 6): Power Supply Pins. For a single 5V
supply (Pin 4 grounded) a quality 0.1µF ceramic bypass
capacitor is required from the positive supply pin (Pin 6)
to the negative supply pin (Pin 4). The bypass should be
as close as possible to the IC. For dual supply applications
(Pin 3 is grounded), bypass Pin 6 to Pin 3 and Pin 4 to
Pin 3 with a quality 0.1µF ceramic capacitor.
V
ODC
(Pin 5): Output DC Offset. Pin 5 is the DC reference
voltage for Pin 8. By applying a DC offset between Pin 3
and Pin 5, a DC offset will be added to the differential signal
between Pin 7 and Pin 8. Like the GND pin, the V
ODC
pin is
a high impedance which requires no bias current. Care
should be taken when biasing Pin 5 since noise between
Pin 3 and Pin 5 will appear at the filter output unattenuated.
The frequency response of Pin 5 is described in the
Applications Information section.
OUT
, OUT
+
(Pins 7, 8): Output Pins. Pins 7 and 8 are the
filter differential outputs. Each pin can drive 1k or 300pF
loads. The DC reference voltage of Pin 8 is the same as the
voltage at Pin 5. The DC reference voltage of Pin 7 is the
same as the voltage at Pin 3.
TYPICAL PERFOR A CE CHARACTERISTICS
UW
TEMPERATURE (°C)
–50
SUPPLY CURRENT (mA)
70
1566-1 G08
–10 30
23
22
21
–30 10 50 90
V
S
= ±5V
V
S
= 5V
FREQUENCY (Hz)
CMRR (dB)
90
80
70
60
50
40
30
10k 100k 1M 10M
1566-1 G09
1k
V
IN
= 1V
P-P
V
S
= 5V
T
A
= 25°C
FREQUENCY (Hz)
PSRR (dB)
70
60
50
40
30
20
10k 100k 1M 10M
1566-1 G10
1k
V
IN
= 0.2V
P-P
V
S
= 5V
T
A
= 25°C
Supply Current vs Temperature
Common Mode Rejection Ratio
Power Supply Rejection Ratio
LTC1566-1
5
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BLOCK DIAGRA
W
APPLICATIO S I FOR ATIO
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Interfacing to the LTC1566-1
The difference between the voltages at Pin 1 and Pin 2 is
the “differential input voltage.” The average of the voltages
at Pin 1 and Pin 2 is the “common mode input voltage.”
The difference between the voltages at Pin 7 and Pin 8 is
the “differential output voltage.” The average of the volt-
ages at Pin 7 and Pin 8 is the “common mode output
voltage.” The input and output common mode voltages
are independent. The input common mode voltage is set
by the signal source, if DC coupled, or by an external
Figure 1
biasing network, if AC coupled (Figures 1 and 2). The
output can also be AC coupled.
The output common mode voltage is equal to the voltage
of Pin 3, the GND pin, whenever Pin 5 is shorted to Pin 3.
In configurations where Pin 5, the V
ODC
pin, is not shorted
to Pin 3, the output common mode voltage is equal to the
average of the voltages at Pin 3 and Pin 5. The operation
of Pin 5 is described in the paragraph “Output DC Offset
Control”. Pin 3 is a high impedance pin and must be biased
externally with an external resistor network or reference
voltage.
+
+
+
+
7th ORDER
FILTER NETWORK
WITH 12dB GAIN
8
1
2
3
4
7
6
5
1×
1×
1×
1×
UNITY GAIN OUTPUT
BUFFERS WITH DC
REFERENCE
ADJUSTMENT
INPUT AMPLIFIERS
WITH COMMON MODE
TRANSLATION CIRCUIT
IN
+
IN
GND
V
OUT
+
OUT
V
+
V
ODC
R
R
1566-1 BD
+
Figure 2
1
2
3
4
8
7
6
5
V
IN
+
V
IN
V
OUT
+
V
OUT
5V
10k 10k
0.1µF 0.1µF
1566-1 F01
+
+
DC COUPLED INPUT
V
IN
(COMMON MODE) =
V
IN
+
+ V
IN
V
OUT
(COMMON MODE) =
V
OUT
+
+ V
OUT
=
V
+
2
22
LTC1566-1
OUT
+
OUT
V
+
V
ODC
IN
+
IN
GND
V
LTC1566-1
1
2
3
4
OUT
+
OUT
V
+
V
ODC
IN
+
IN
GND
V
8
7
6
5
V
IN
+
V
IN
V
OUT
+
V
OUT
5V
10k
10k
0.1µF 0.1µF
1566-1 F02
+
+
100k
100k
AC COUPLED INPUT
V
IN
(COMMON MODE) = V
OUT
(COMMON MODE) =
V
+
2
0.1µF
0.1µF
LTC1566-1
6
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a common mode voltage that is equal to one-half of the total
supply voltage. Figure 5 illustrates the THD versus output
common mode voltage for a 0.5V
P-P
/2.0V
P-P
differential
input/output voltage and a common mode input voltage
that is equal to one-half the total supply voltage.
Output DC Offset Control
A unique feature of the LTC1566-1 is the ability to introduce
a differential offset voltage at the output of the filter. As
seen in the “Block Diagram”, if a DC voltage is applied to Pin
5 with respect to Pin 3, the same voltage will be added to
the differential voltage seen between Pins 8 and 7.
The output DC offset control pin can be used for sideband
suppression in differential modulators, calibration of A/D
converters, or simple signal summation. Since the voltage
summing occurs at the output of the filter, Pin 5 acts as a
unfiltered input. The response from Pin 5 to Pin 8 – Pin 7
with Pins 1,2 and 3 grounded is shown in Figure 7. The
range of voltages that can be applied to Pin 5 is shown in
Figure 6 where THD is plotted versus output offset. Pin 3 is
biased to mid supply.
Output Drive
Pins 7 and 8 can drive a 1k or 300pF load connected to
AC ground with a ±0.5V signal (corresponding to a 2V
P-P
differential signal). For differential loads (loads connected
across Pins 7 and 8) the outputs can produce a 2V
P-P
differential signal across 2k or 150pF. For smaller signal
amplitudes the outputs can drive correspondingly larger
loads.
–5 –4 –2 0 2 4
–30
–40
–50
–60
–70
–80
–90
–3 –1 1 3
1566-1 F03
5
INPUT COMMON MODE VOLTAGE (V)
THD (dB)
V
S
= 5V
V
S
= ±5V
DIFFERENTIAL OUTPUT (V
P-P
)
0.5
THD, SNR (dB)
–30
–40
–50
–60
–70
–80
–90
2.0 3.0
1566-1 F04
1.0 1.5
2.5 3.5 4.0
V
S
= 5V
V
S
= ±5V
S/N
OUTPUT COMMON MODE VOLTAGE (V)
–4
THD (dB)
–30
–40
–50
–60
–70
–80
–90
–1 2
1566-1 F05
–3 –2
1034
V
S
= 5V
V
S
= ±5V
Figure 3
Figure 4
Figure 5
APPLICATIO S I FOR ATIO
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Input Common Mode and Differential Voltage Range
The range of voltage each input can support while operat-
ing in its linear region is typically 0.8V to 3.7V for a single
5V supply and –4.2V to 3.2V for a ±5V supply. Therefore,
the filter can accept a variety of common mode input
voltages. Figure 3 shows the total harmonic distortion of
the filter versus input common mode voltage with a
2V
P-P
differential output signal.
Figure 4 shows the total harmonic distortion and signal to
noise ratio versus differential output voltage level for both
a single 5V and a ±5V supply. The common mode voltage
of the input signal is one-half the total power supply voltage
of the filter. The spurious free dynamic range (SFDR), the
level where the THD and S/N ratio are equal, is 72dB.
For best performance, the inputs should be driven differen-
tially. For single-ended signals, connect the unused input
to Pin 3 or a common mode reference.
The filter DC differential swings listed in the “Electrical
Characteristics” are measured with input differential volt-
ages of 0.9V
P-P
and 1.5V
P-P
for 5V and ±5V supplies
respectively. Ideally the corresponding output levels would
be 3.6V
P-P
and 6V
P-P
. As seen in Figure 4, these levels are
above the range of linear operation. Input signals larger
than 0.9V
P-P
/1.5V
P-P
will result in phase inversion and
should be avoided.
Output Common Mode and Differential Voltage Range
The output is a fully differential signal with a common
mode level equal to the voltage at Pin 3 when Pin 5 is
shorted to Pin 3. The best performance is achieved using

LTC1566-1IS8#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Active Filter L N 2.3MHz Continuous Time Lpass Filt
Lifecycle:
New from this manufacturer.
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