IDT7014S
High-Speed 4K x 9 Dual-Port Static RAM Industrial and Commercial Temperature Ranges
4
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(VCC = 5V ± 10%)
AC Test Conditions
Capacitance
(1)
(TA = +25°C, f = 1.0MHz) TQFP Package Only
NOTES:
1. This parameter is determined by device characteristics but is not production
tested.
2. 3dv references the interpolated capacitance when the input and output signals
swith from 0V to 3V or from 3V to 0V.
Figure 1. AC Output Test Load.
Figure 2. Output Test Load
(for tHZ, tWZ, and tOW)
*Including scope and jig.
Figure 3. Typical Output Derating (Lumped Capacitive Load).
NOTES:
1. At f = fmax, address inputs are cycling at the maximum read cycle of 1/tRC using the "AC Test Conditions" input levels of GND to 3V.
893
30pF
347
DATA
OUT
5V
5V
893
5pF*
347
DATA
OUT
2528 drw 05
2528 drw 04
,
Symbol Parameter Test Condition Version
7014S12
Com'l Only
7014S15
Com'l Only
UnitTyp. Max Typ. Max
I
CC
Dynamic Operating
Current
(Both Ports Active)
Outputs Open
f = f
MAX
(1)
COM'L S 160 250 160 250
mA
IND S
____ ____ ____ ____
2528 tbl 05a
Symbol Parameter Test Condition Version
7014S20
Com'l & Ind
7014S25
Com'l Only
UnitTyp. Max Typ. Max.
I
CC Dynamic Operating
Current
(Both Ports Active)
Outputs Open
f = f
MAX
(1)
COM'L S 155 245 150 240
mA
IND S 155 260
____ ____
2528 tbl 05b
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
3ns Max.
1.5V
1.5V
Figures 1,2 and 3
2528 tbl 06
Symbol Parameter Conditions
(2 )
Max. Unit
C
IN
Input Capacitance V
IN
= 3dV 9 pF
C
OUT
Output Capacitance V
OUT
= 3dV 10 pF
2528 tbl 07
1
2
3
4
5
6
7
8
20 40 100 60 80 120 140 160 180 200
t
AA
(Typical, ns)
Capacitance (pF)
2528 drw 06
-1
0
10pF is the I/O capacitance
of this device, and 30pF is the
AC Test Load Capacitance
,
6.42
IDT7014S
High-Speed 4K x 9 Dual-Port Static RAM Industrial and Commercial Temperature Ranges
5
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage
NOTES:
1. Transition is measured 0mV from Low or High-impedance voltage with Output Test Load (Figure 2).
2. This parameter is determined by device characterization, but is not production tested.
7014S12
Com'l Only
7014S15
Com'l Only
UnitSymbol Parameter Min.Max.Min.Max.
READ CYCLE
t
RC
Read Cycle Time 12
____
15
____
ns
t
AA
Address Access Time
____
12
____
15 ns
t
AOE
Output Enable Access Time
____
8
____
8ns
t
OH
Output Hold from Address Change 3
____
3
____
ns
t
LZ
Output Low-Z Time
(1,2)
3
____
3
____
ns
t
HZ
Output High-Z Time
(1,2)
____
7
____
7ns
2528 tbl 08a
7014S20
Com'l & Ind
7014S25
Com'l Only
UnitSymbol Parameter Min.Max.Min.Max.
READ CYCLE
t
RC
Read Cycle Time 20
____
25
____
ns
t
AA
Address Access Time
____
20
____
25 ns
t
AOE
Output Enable Access Time
____
10
____
12 ns
t
OH
Output Hold from Address Change 3
____
3
____
ns
t
LZ
Output Low-Z Time
(1,2)
3
____
3
____
ns
t
HZ
Output High-Z Time
(1,2)
____
9
____
11 ns
2528 tbl 08b
IDT7014S
High-Speed 4K x 9 Dual-Port Static RAM Industrial and Commercial Temperature Ranges
6
Timing Waveform of Write with Port-to-Port Read
(1,2)
Timing Waveform of Read Cycle No. 1, Either Side
(1,2)
Timing Waveform of Read Cycle No. 2, Either Side
(1, 3)
NOTES:
1. R/W"B" = VIH, read cycle pass through.
2. All timing is the same for left and right ports. Port "A" may be either left or right port. Port "B" is opposite from port "A".
ADDRESS
DATA
OUT
PREVIOUS DATA VALID DATA VALID
t
OH
t
OH
t
AA
t
RC
2528 drw 07
2528 drw 08
DATA
OUT
VALID DATA
t
AOE
OE
t
LZ
t
HZ
NOTES:
1. R/W = VIH for Read Cycles.
2. OE = VIL.
3. Addresses valid prior to OE transition LOW.
2528 drw 09
R/W
"A"
VALID
t
WC
MATCH
VALID
MATCH
t
WP
t
DW
t
WDD
t
DDD
ADDR
"A"
DATA
IN "A"
DATA
OUT "B"
ADDR
"B"
t
DH

7014S12JG

Mfr. #:
Manufacturer:
IDT
Description:
SRAM 4KX9 SYNC DUAL PORT
Lifecycle:
New from this manufacturer.
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