1
PS8659C 10/30/09
Features
• Meets or Exceeds the Requirements of ANSI
TIA/EIA-644-1995 Standard
• Signaling rates up to 400 Mbps
• Interfaces to LVDS, LVPECL
• Bus-Terminal ESD exceeds 10kV
• Differential Input Voltage Threshold less than 100mV
• Typical Propagation Delay Times of 2.6ns
• Typical Power Dissipation of 40mW @200 MHz
• Low Voltage TTL (LVTTL) Level is 5V Tolerant
• Open-Circuit Fail Safe
• Output are High Impedance with V
CC
<1.5V
• Integrated 110-ohm Line Termination Resistor (PI90LVT02)
• Operates from a 3.3V supply
• Input common-mode voltage range 0V–3.2V
• Industrial Temperature Operating Range: –40°C to 85°C
• Packaging (Pb-free & Green available):
- 5-pin space-saving SOT23 (T)
PI90LV02/PI90LVT02
SOTiny
TM
LVDS High-Speed
Differential Line Receiver
stupnIstuptuO
V
DI
V=
A
V–
B
R
TUO
V
DI
Vm05>H
V<Vm05–
DI
Vm05<?
V
DI
≤ Vm05–L
nepOH
Description
The PI90LV02 and PI90LVT02 are single differential line receivers
that use low-voltage differential signaling (LVDS) to support data
rates up to 400 Mbps. These products are designed for applications
requiring high-speed, low-power consumption, low-noise genera-
tion, and a small package.
A differential input signal (350mV) is translated by the device to a
3.3V CMOS output level. The PI90LVT02 integrates the terminating
resistor while the PI90LV02 requires an external resistor.
Applications
Applications include point-to-point and multi-drop baseband data
transmissions over impedance media of approximately 100-ohms.
The transmission media can be printed circuit board traces,
backplanes, or cables.
The PI90LV02 and PI90LVT02 and companion line drivers (PI90LV01
and PI90LVB01) provide new alternatives to RS-232, PECL, and ECL
devices for high-speed, point-to-point interface applications.
H = high level
L = low level
? = indeterminate
Logic Diagram
Function Table
Pinout
5
3
A
4
B
R
OUT
PI90LV02
5
3
A
4
110-ohm
B
R
OUT
PI90LVT02
1
2
3
V
CC
GND
A
R
OUT
B
5
4
