MAX6946ATE+ Datasheet MAX6946ATE+, MAX6947ATE+, MAX6947ATE+T | P16-P18

MAX6946/MAX6947

and requires sending at least the MAX6946/MAX6947s’

C slave address. When using the internal oscillator,

the minimum timeout period is 127/45000 equal to

2.822ms. When using an external oscillator for the PWM

clock, the timeout period is 127/OSC. The shortest time

period allowed is 1.27ms; this number corresponds to

the maximum OSC frequency of 100kHz. When using

the internal oscillator, the minimum I

C clock speed

that guarantees a successful start bit and eight data

bits (9 bits total) within the minimum timeout period is

9/5.66ms equal to 1590Hz. Canceling the Reset Run

trigger clears the Reset Run bit (D1) in the configura-

tion register, disabling Reset Run. The run bit (D0) in

the configuration register remains cleared, so the driver

remains in shutdown.

OSC Input

The MAX6946 can use an external clock of up to

100kHz instead of the internal 32kHz oscillator.

Connect the external clock to the OSC input and set the

OSC bit in the configuration register to enable the

MAX6946 to use the external clock (Table 2).

Serial Interface

Serial Addressing

The MAX6946/MAX6947 operate as a slave that sends

and receives data through an I

C-compatible, 2-wire

interface. The interface uses a serial-data line (SDA)

and a serial-clock line (SCL) to achieve bidirectional

communication between master(s) and slave(s). A

master (typically a microcontroller) initiates all data

transfers to and from the MAX6946/MAX6947 and gen-

erates the SCL clock that synchronizes the data trans-

fer (Figure 8).

The MAX6946/MAX6947 SDA line operates as both an

input and an open-drain output. A pullup resistor, typi-

cally 4.7kΩ, is required on SDA. The MAX6946/

MAX6947 SCL line operates as an input. A pullup resis-

tor, typically 4.7kΩ, is required on SCL if there are mul-

tiple masters on the 2-wire interface, or if the master in

a single-master system has an open-drain SCL output.

Each transmission consists of a START condition

(Figure 9) sent by a master, followed by the MAX6946/

MAX6947 7-bit slave address plus the R/W bit, a regis-

ter address byte, one or more data bytes, and finally a

STOP condition (Figure 9).

10-Port, Constant-Current LED Driver and

I/O Expander with PWM Intensity Control

16 ______________________________________________________________________________________

SCL

SDA

BUF

START

CONDITION

STOP

CONDITION

REPEATED START CONDITION

START CONDITION

SU,STO

HD,STA

SU,STA

HD,DAT

SU,DAT

LOW

HIGH

HD,STA

Figure 8. 2-Wire Serial Interface Timing Details

Start and Stop Conditions

Both SCL and SDA remain high when the interface is

not busy. A master signals the beginning of a transmis-

sion with a START (S) condition by transitioning SDA

from high to low while SCL is high. When the master fin-

ishes communicating with the slave, it issues a STOP

(P) condition by transitioning SDA from low to high

while SCL is high. The bus is then free for another

transmission (Figure 9).

Bit Transfer

One data bit is transferred during each clock pulse.

The data on SDA must remain stable while SCL is high

(Figure 10).

Acknowledge

Any bytes received after the command byte are data

bytes. The first data byte goes into the internal register

of the MAX6946/MAX6947 selected by the command

byte (Figure 11). If multiple data bytes are transmitted

before a STOP condition is detected, these bytes are

generally stored in subsequent MAX6946/MAX6947

internal registers because the command byte autoin-

crements (Table 1).

Message Format for Reading

Read from the MAX6946/MAX6947 using the

MAX6946/MAX6947s’ internally stored command byte

as an address pointer the same way the stored com-

mand byte is used as an address pointer for a write.

The pointer autoincrements after each data byte is read

using the same rules as for a write (Table 1). Thus, a

read is initiated by first configuring the MAX6946/

MAX6947s’ command byte by performing a write

(Figures 12 and 13). The master can now read n con-

secutive bytes from the MAX6946/MAX6947 with the

first data byte being read from the register addressed

by the initialized command byte (Figure 14). When per-

forming read-after-write verification, remember to reset

the command byte’s address because the stored com-

mand byte address has been autoincremented after

the write (Table 1).

MAX6946/MAX6947

10-Port, Constant-Current LED Driver and

I/O Expander with PWM Intensity Control

______________________________________________________________________________________ 17

Table 10. MAX6946/MAX6947 Slave

Addresses

MAX6947 SLAVE ADDRESS

AD0 = GND 010 0000

AD0 = V

010 0100

MAX6946 010 0000

SDA

SCL

START

CONDITION

STOP

CONDITION

Figure 9. Start and Stop Conditions

SDA

SCL

DATA LINE STABLE;

DATA VALID

CHANGE OF DATA

ALLOWED

Figure 10. Bit Transfer

SCL

SDA BY

TRANSMITTER

CLOCK PULSE

FOR ACKNOWLEDGE

START

CONDITION

SDA BY

RECEIVER

12 89

Figure 11. Acknowledge

MAX6946/MAX6947

Operation with Multiple Masters

If the MAX6946/MAX6947 operates on a 2-wire inter-

face with multiple masters, a master reading the

MAX6946/MAX6947 should use a repeated start

between the write. This sets the MAX6946/MAX6947

address pointer, and the read(s) that takes the data

from the location(s) (Table 1). This is because it is pos-

sible for master 2 to take over the bus after master 1

has set up the MAX6946/MAX6947s’ address pointer,

then master 1’s delayed read can be from an unexpect-

ed location.

Command Address Autoincrementing

The command address stored in the MAX6946/

MAX6947 increments through the grouped register func-

tions after each data byte is written or read (Table 1).

Applications Information

Port Input and I

C Interface-Level

Translation from Higher or

Lower Logic Voltages

The MAX6946/MAX6947s’ I

C interface (SDA, SCL) and

C slave address select input AD0 (MAX6947 only),

PWM clock input OSC (MAX6946 only), and reset input

RST are overvoltage protected to +6V, independent of

. The 10 I/O ports P0–P9 are overvoltage protected

to +8V independent of V

. This allows the MAX6946/

MAX6947 to operate from one supply voltage, such as

3.3V, while driving the I

C interface and/or some of the

10 I/O as inputs from a higher logic level, such as 5V.

10-Port, Constant-Current LED Driver and

I/O Expander with PWM Intensity Control

18 ______________________________________________________________________________________

SAA

0SLAVE ADDRESS COMMAND BYTE

ACKNOWLEDGE FROM MAX6946/MAX6947

D15 D14 D13 D12 D11 D10 D9 D8

COMMAND BYTE IS STORED ON RECEIPT OF

STOP CONDITION

ACKNOWLEDGE FROM MAX6946/MAX6947

R/W

Figure 12. Command Byte Received

SAAAP0SLAVE ADDRESS COMMAND BYTE DATA BYTE

BYTE

AUTOINCREMENT MEMORY ADDRESS

D15 D14 D13 D12 D11 D10 D9 D8 D1 D0D3 D2D5 D4D7 D6

ACKNOWLEDGE FROM MAX6946/MAX6947 ACKNOWLEDGE FROM MAX6946/MAX6947

ACKNOWLEDGE FROM MAX6946/MAX6947

HOW COMMAND BYTE AND DATA BYTE MAP INTO

MAX6946/MAX6947s' REGISTERS

R/W

Figure 13. Command and Single Data Byte Received

SAAAP0SLAVE ADDRESS COMMAND BYTE DATA BYTE

BYTES

D15 D14 D13 D12 D11 D10 D9 D8 D1 D0D3 D2D5 D4D7 D6

ACKNOWLEDGE FROM MAX6946/MAX6947 ACKNOWLEDGE FROM MAX6946/MAX6947

ACKNOWLEDGE FROM MAX6946/MAX6947

HOW COMMAND BYTE AND DATA BYTE MAP INTO

MAX6946/MAX6947s' REGISTERS

R/W

AUTOINCREMENT MEMORY ADDRESS

Figure 14. n Data Bytes Received

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24

MAX6946ATE+

Mfr. #:

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Manufacturer:

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Description:

LED Lighting Drivers 10-Port Constant Current LED Driver

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MAX6946ATE+

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