8
Z85233
CPS DC-4058-03
AC CHARACTERISTICS
Z85233 Read and Write Timing Table
10 MHz 16 MHz
No Symbol Parameter Min Max Min Max Notes
11 TsIAi(WR) /INTACK to /WR Fall Setup Time 130 70 [1]
12 ThIA(WR) /INTACK to /WR Rise Hold Time 0 0
13 TsIAi(RD) /INTACK to /RD Fall Setup Time 130 70 [1]
14 ThIA(RD) /INTACK to /RD Rise Hold Time 0 0
15 ThIA(PC) /INTACK to PCLK Rise Hold Time 30 15
16 TsCEI(WR) /CE Low to /WR Fall Setup Time 0 0
17 ThCE(WR) /CE to /WR Rise Hold Time 0 0
18 TsCEh(WR) /CE High to /WR Fall Setup Time 50 30
19 TsCEI(RD) /CE Low to /RD Fall Setup Time 0 0 [1]
20 ThCE(RD) /CE to /RD Rise Hold Time 0 0 [1]
21 TsCEh(RD) /CE High to /RD Fall Setup Time 50 30 [1]
22 TwRDI /RD Low Width 125 2TcPC 70 2TcPC [1]
23 TdRD(DRA) /RD Fall to Read Data Active Delay 0 0
24 TdRDr(DR) /RD Rise to Data Not Valid Delay 0 0
25 TdRDI(DR) /RD Fall to Read Data Valid Delay 120 70
26 TdRD(DRz) /RD Rise to Read Data Float Delay 35 30
27 TdA(DR) Addr to Read Data Valid Delay 180 100
28 TwWRI /WR Low Width 125 75
29 TdWR(DW) /WR Fall to Write Data Valid Delay 20 20
30 ThDW(WR) Write Data to /WR Rise Hold Time 0 0
31 TdWR(W) /WR Fall to Wait Valid Delay 100 50 [4]
32 TdRD(W) /RD Fall to Wait Valid Delay 100 50 [4]
33 TdWRf(REQ) /WR Fall to /W//REQ Not Valid Delay 120 70
34 TdRDf(REQ) /RD Fall to /W//REQ Not Valid Delay 120 70 [6]
35a TdWRr(REQ) /WR Fall to /DTR//REQ Not Valid 4TcPc 4TcPc
35b TdWRr(REQ) /WR Fall to /DTR//REQ Not Valid 100 70 [6]
36 TdRDr(REQ) /RD Rise to /DTR//REQ Not Valid Delay NA NA
37 TdPC(INT) PCLK Fall to /INT Valid Delay 320 175
38 TdIAi(RD) /INTACK to /RD Fall (Ack) Delay 90 50 [5]
39 TwRDA /RD (Acknowledge) Width 125 75
40 TdRDA(DR) /RD Fall(Ack) to Read Data Valid Delay 120 70
41 TsIEI(RDA) IEI to /RD Fall (Ack) Setup Time 95 50
42 ThIEI(RDA) IEI to /RD Rise (Ack) Hold Time 0 0
43 TdIEI(IEO) IEI to IEO Delay Time 90 45
44 TdPC(IEO) PCLK Rise to IEO Delay 175 80
45 TdRDA(INT) /RD Fall to /INT Inactive Delay 320 200 [4]
46 TdRD(WRQ) /RD Rise to /WR Fall Delay for No Reset 15 10
47 TdWRQ(RD) /WR Rise to /RD Fall Delay for No Reset 15 10
48 TwRES /WR and /RD Low for Reset 100 75
49 Trc Valid Access Recovery Time 4TcPc 4TcPc [3]
Notes:
[1] Parameter does not apply to Interrupt Acknowledge transactions.
[3] Parameter applies only between transactions involving the EMSCC.
[4] Open-drain output, measured with open-drain test load.
[5] Parameter is system dependent. For any EMSCC in the daisy chain, TdIAi(RD) must be greater than the sum of TdPC(IEO) for the highest priority
device in the daisy chain. TsIEI(RDA) for the EMSCC and TdIEI(IEO) for each device separating them in the daisy chain.
[6] Parameter applies to enhanced Request mode only (WR7' D4=1)
