MAX4581CUE+T Datasheet MAX4583EUE+, MAX4583AUE+, MAX4583CUE+ | P13-P15

MAX4581/MAX4582/MAX4583

Low-Voltage, CMOS Analog

Multiplexers/Switches

______________________________________________________________________________________ 13

50%

V+

0V

V

X

, V

Y

, V

Z

V

OUT

V

A

, V

B

, V

C

0V

80%

t

BBM

V

CC

V

OUT

V

A

, V

B

, V

C

V

A

, V

B

V

A

, V

B

, V

C

V

EE

GND

V

CC

B

V

EE

A

C

ENABLE

X0–X7

X

V

CC

MAX4581

300Ω

50Ω

35pF

V

CC

V

OUT

V

EE

GND

V

CC

B

V

EE

A

ENABLE

X0–X3,

Y0–Y3

X, Y

V

CC

MAX4582

300Ω

35pF

V

CC

V

OUT

V

EE

GND

V

CC

V

EE

A, B, C

ENABLE

X0, X1, Y0,

Y1, Z0, Z1

X, Y, Z

V

CC

MAX4583

300Ω

35pF

50Ω

V

EE

= 0V FOR SINGLE-SUPPLY OPERATION.

TEST EACH SECTION INDIVIDUALLY.

t

R

< 20ns

t

F

< 20ns

Figure 4. Break-Before-Make Interval

0V

V

CC

V

Enable

∆ V

OUT

IS THE MEASURED VOLTAGE DUE TO CHARGE

TRANSFER ERROR Q WHEN THE CHANNEL TURNS OFF.

∆ V

OUT

V

EE

= 0V FOR SINGLE-SUPPLY OPERATION.

TEST EACH SECTION INDIVIDUALLY.

Q = ∆ V

OUT

X C

L

V

OUT

V

CC

V

OUT

V

ENABLE

V

EE

GND

V

CC

B

V

EE

A

CHANNEL

SELECT

C

ENABLE

X_, Y_, Z_

X, Y, Z

MAX4581

MAX4582

MAX4583

50Ω

C

L

= 1000pF

Figure 5. Charge Injection

_________________________________Test Circuits/Timing Diagrams (continued)

MAX4581/MAX4582/MAX4583

Low-Voltage, CMOS Analog

Multiplexers/Switches

14 ______________________________________________________________________________________

MEASUREMENTS ARE STANDARDIZED AGAINST SHORT AT SOCKET TERMINALS.

OFF-ISOLATION IS MEASURED BETWEEN COM AND "OFF" NO TERMINAL ON EACH SWITCH.

ON-LOSS IS MEASURED BETWEEN COM AND "ON" NO TERMINAL ON EACH SWITCH.

CROSSTALK (MAX4582/MAX4583) IS MEASURED FROM ONE CHANNEL (A, B, C) TO ALL OTHER CHANNELS.

SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.

V

CC

V

OUT

V

IN

V

EE

GND

V

CC

V

IN

V

OUT

MEAS.

NETWORK

ANALYZER

50Ω 50Ω

50Ω

OFF-ISOLATION = 20log

ON-LOSS = 20log

CROSSTALK = 20log

50Ω

REF.

B

V

EE

V

OUT

V

IN

V

OUT

V

IN

A

CHANNEL

SELECT

C

ENABLE

X_, Y_, Z_

X, Y, Z

10nF

MAX4581

MAX4582

MAX4583

Figure 6. Off Isolation, On Loss, and Crosstalk

V

CC

V

EE

GND

V

CC

B

V

EE

A

CHANNEL

SELECT

1MHz

CAPACITANCE

ANALYZER

C

ENABLE

X_, Y_, Z_

X, Y, Z

MAX4581

MAX4582

MAX4583

Figure 7. Capacitance

_________________________________Test Circuits/Timing Diagrams (continued)

MAX4581/MAX4582/MAX4583

Low-Voltage, CMOS Analog

Multiplexers/Switches

______________________________________________________________________________________ 15

PART TEMP RANGE

PIN-

PACKAGE

TOP

MARK

MAX4581CEE+ 0°C to +70°C 16 QSOP —

MAX4581EPE+ -40°C to +85°C 16 PDIP —

MAX4581ESE+ -40°C to +85°C 16 Narrow SO —

MAX4581EUE+ -40°C to +85°C 16 TSSOP —

MAX4581EEE+ -40°C to +85°C 16 QSOP —

MAX4581ETE+ -40°C to +85°C 16 TQFN-EP* AGH

MAX4581ASE+ -40°C to +125°C 16 Narrow SO —

MAX4581AUE+ -40°C to +125°C 16 TSSOP —

MAX4582CPE+ 0°C to +70°C 16 PDIP —

MAX4582CSE+ 0°C to +70°C 16 Narrow SO —

MAX4582CUE+ 0°C to +70°C 16 TSSOP —

MAX4582CEE+ 0°C to +70°C 16 QSOP —

MAX4582EPE+ -40°C to +85°C 16 PDIP —

MAX4582ESE+ -40°C to +85°C 16 Narrow SO —

MAX4582EUE+ -40°C to +85°C 16 TSSOP —

Ordering Information (continued)

+

Denotes a lead(Pb)-free/RoHS-compliant package.

/V Denotes an automotive qualified part.

T = Tape and reel.

*

EP = Exposed pad.

PART TEMP RANGE

PIN-

PACKAGE

TOP

MARK

MAX4582EEE+ -40°C to +85°C 16 QSOP —

MAX4582ETE+ -40°C to +85°C 16 TQFN-EP* AGH

MAX4582ASE+ -40°C to +125°C 16 Narrow SO —

MAX4582AUE/V+T -40°C to +125°C 16 TSSOP —

MAX4583CPE+ 0°C to +70°C 16 PDIP —

MAX4583CSE+ 0°C to +70°C 16 Narrow SO —

MAX4583CUE+ 0°C to +70°C 16 TSSOP —

MAX4583CEE+ 0°C to +70°C 16 QSOP —

MAX4583EPE+ -40°C to +85°C 16 PDIP —

MAX4583ESE+ -40°C to +85°C 16 Narrow SO —

MAX4583EUE+ -40°C to +85°C 16 TSSOP —

MAX4583EEE+ -40°C to +85°C 16 QSOP —

MAX4583ETE+ -40°C to +85°C 16 TQFN–EP* AGH

MAX4583ASE+ -40°C to +125°C 16 Narrow SO —

MAX4583AUE+ -40°C to +125°C 16 TSSOP —

BOTTOM VIEW

*CONNECT EXPOSED PAD TO V

CC

12

13

14

15

+

++

16

8

7

6

5

11 10 9

1234

X1 X0 X3

A

B

C

GND

V

EE

V

CC

X4

X6

X

X7 X5

EN

X2

MAX4581

*EP

12

13

14

15

16

8

7

6

5

11 10 9

1234

X1

X

X0 X3

A

B

GND

V

EE

V

CC

Y0

Y2

Y

Y3 Y1

EN

X2

MAX4582

*EP

12

13

14

15

16

8

7

6

5

11 10 9

1234

X

X1 X0

A

B

C

GND

V

EE

V

CC

Y1

Y0

Z1

Z

Z0

EN

Y

MAX4583

*EP

TQFN

TQFN TQFN

Pin Configurations/Functional Diagrams (continued)

MAX4581CUE+T

MAX4581CUE+T

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