MAX5732–MAX5735
32-Channel, 16-Bit, Voltage-Output
DACs with Serial Interface
22 ______________________________________________________________________________________
W WD2 W WD1
W
WD0 R XX R XX R XX X XX X XX X XXDIN(0)
CS
DOUT(0)
WD1WWD2WXXRXXRWD0W R RD0 X XX X XX
DOUT(1)
W WD2 W WD1 W WD0 R XX R RD1 R RD0 X XX
DOUT(2)
W WD2 W WD1 W WD0 R RD2 R RD1 R RD0
W WD2 R XX
W
WD0 R XX W WD1 R XX X XX X XX X XXDIN(0)
CS
DOUT(0)
XXRWD2W WD1WXXRWD0W R RD0 X XX X XX
DOUT(1)
W WD2 R RD1 W WD0 R XX W WD1 R RD0 X XX
DOUT(2)
W WD2 R RD1 W WD0 R RD2 W WD1 R RD0
Figure 5. Example 1 of a Daisy-Chain Data Sequence
W/WD0 = 32-bit word with a write command; WD0 writes data for device 0. The 0 refers to the position in the daisy chain (0 is closest
to the bus master). Devices 1 and 2 are devices further down the chain.
R/RD2 = 32-bit word with a read command; RD2 reads data from device 2.
X = Don’t care (for X in the data or command position).
Figure 6. Example 2 of a Daisy-Chain Data Sequence
W/WD0 = 32-bit word with a write command; WD0 writes data for device 0. The 0 refers to the position in the daisy chain (0 is closest
to the bus master). Devices 1 and 2 are devices further down the chain.
R/RD2 = 32-bit word with a read command; RD2 reads data from device 2.
X = Don’t care (for X in the data or command position).
MAX5732–MAX5735
32-Channel, 16-Bit, Voltage-Output
DACs with Serial Interface
______________________________________________________________________________________ 23
Read-Data Format
The MAX5732–MAX5735 support daisy-chain connec-
tions of multiple devices. The default (power-up) config-
uration for the MAX5732–MAX5735 assumes that the
device may be part of a daisy chain of devices. DOUT
follows DIN after 32 clock cycles. For a read command,
DOUT provides read data (instead of the data value
shifted in) in the next cycle following a CS rising edge.
Figures 5 and 6 show examples of daisy-chain
data sequences.
Shutdown Mode
The MAX5732–MAX5735 feature a software-controlled
low-power shutdown mode. When bit 11 of the configu-
ration register is a logic high, the analog section of the
device is disabled, and the outputs go high impedance.
In shutdown, supply current is reduced to 50µA. Data
stored in the DAC and input registers is retained, and
the device outputs return to their previous values when
the device is brought out of shutdown. The serial inter-
face remains active while the device is in shutdown.
Power-Up State
The MAX5732–MAX5735 monitor the four power supplies
and maintain the output buffers in a known state until suffi-
cient voltage is available to ensure that no output glitches
occur. Once the minimum voltage threshold has been
passed, the device outputs come up in the clear state (all
outputs = 0). For proper power sequencing, V
SS
must be
applied first. Power sequencing is not necessary if V
SS
is
connected to AGND.
CONTROLLER
DEVICE
DIN
DOUT
1 OR 0
SCLK
CS
MAX573_
DSP
Figure 7. Stand-Alone Configuration
CONTROLLER
DEVICE
DIN
DOUT
1 OR 0
1 OR 0
1 OR 0
SCLK
CS
MAX573_
DIN
DOUT
SCLK
CS
MAX573_
DIN
DOUT
SCLK
CS
MAX573_
DSP
DSP
DSP
Figure 8. Example of a Parallel Configuration with Read-Back
C1C2
C0
A5
A4
A3 A2
A1 A0 Sp Sp Sp Sp Sp Sp Sp
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
D15 D14 D13
D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
DIN(0)
SCLK
CS (µC)
CS (DSP)
DOUT(0)
OR
Figure 9. Read Data Timing When Not Daisy Chained
MAX5732–MAX5735
32-Channel, 16-Bit, Voltage-Output
DACs with Serial Interface
24 ______________________________________________________________________________________
Applications Information
MEMS Micromirror Control
The MAX5732/MAX5733 are the highest resolution 32-
channel DACs available in the smallest footprint, mak-
ing the devices ideal for optical MEMS mirror control
(Figure 10). A high-resolution DAC forms the core ana-
log block for controlling the X and Y position of the mir-
ror. As the density of the optical cross-connects
increases, the number of DAC channels also increases.
By offering the highest resolution and the greatest den-
sity, the MAX5732/MAX5733 improve performance and
reduce the board footprint.
Automatic Test Equipment (ATE)
Applications
The MAX5734 includes many features suited for ATE
applications. The device is the most compact level-set-
ting solution available for high-density pin electronics
boards. The MAX5734 provides a -2.5V to +7.5V output
voltage range (required by most ATE applications).
The offset DAC simultaneously adjusts the voltage
range of all 32 DACs, allowing optimization to the appli-
cation. The remote-sense feature allows the pin elec-
tronic voltages to be referenced to the ground potential
at the DUT site.
The B grade linearity error of ±2.44mV (max) is more than
sufficient for most ATE applications. The A grade device
cuts this error to ±1.22mV (max) for higher accuracy.
The pipelined register architecture allows all 32 DACs
to be updated simultaneously. This is valuable during
test setups, as all values in the tester can be set and
then updated in unison with a single command. This
feature can be accessed through the serial port or the
LDAC input.
The low output noise of the MAX5734 allows direct con-
nection to the pin electronics, eliminating the cost and
PC board area of external filtering.
Modern pin electronics integrated circuits (PEICs) are
typically fabricated on high-speed processes with low
breakdown voltages. Some devices require external
ADC
MAX5732
MAX5733
DAC0
HVDRV0
HVDRV31
DAC31
14 TO 16 BITS
VOLTAGE
REFERENCE
VOLTAGE
REFERENCE
DSP
CONTROL
ALGORITHM
POSITION OR
OPTICAL
FEEDBACK
PGA OR
FIXED GAIN AMPS
MEMS MIRRORS WITH
X AND Y CONTROL
THIN-FILM FILTER OR
PLANAR LIGHT WAVE
SEPARATORS
WITH OPTICAL
LENSES
MEMS
MIRRORS WITH
X AND Y
CONTROL
DWDM
PIPE
OPTICAL LENSES
AND COLLIMATORS
14 TO 16 BITS
DWDM
PIPE
Figure 10. MEMS Mirror Control

MAX5735BUTN+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Digital to Analog Converters - DAC 10-Bit 32Ch Precision DAC
Lifecycle:
New from this manufacturer.
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