OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

LTC5592IUH#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
LTC5592
16
5592fa
For more information www.linear.com/LTC5592
applicaTions inForMaTion
Table 4. Performance Comparison with V
CCIF
= 3.3V and 5V
(RF = 1950MHz, High Side LO, IF = 190MHz)
V
CCIF
(V)
R2A
(Ω)
I
CCIF
(mA)
G
C
(dB)
P1dB
(dBm)
IIP3
(dBm)
NF
(dB)
3.3 Open 202 8.7 10.6 25.4 9.8
1k 202 7.5 11.3 25.4 9.9
5 Open 209 8.7 14.0 25.5 9.9
(RF = 2350MHz, Low Side LO, IF = 190MHz)
V
CCIF
(V)
R2A
(Ω)
I
CCIF
(mA)
G
C
(dB)
P1dB
(dBm)
IIP3
(dBm)
NF
(dB)
3.3 Open 202 8.3 11.0 27.3 9.8
1k 202 7.1 11.8 27.5 9.8
5 Open 209 8.1 14.6 28.0 10.0
The IFBA pin (Pin 20) is available for reducing the DC
current consumption of the IF amplifier, at the expense of
IIP3. The nominal DC voltage at Pin 20 is 2.1V, and this pin
should be left open-circuited for optimum performance.
The internal bias circuit produces a 4mA reference for the
IF amplifier, which causes the amplifier to draw approxi
-
mately 101mA. If resistor R1A is connected to Pin 20 as
shown in Figure 7, a portion of the reference current can
be shunted to ground, resulting in reduced IF amplifier
current. For example, R1A = 1k will shunt away 1.5mA
from Pin 20 and the IF amplifier current will be reduced
by 25% to approximately 75.5mA. Table 5 summarizes
RF performance versus IF amplifier current.
Table 5. Mixer Performance with Reduced IF Amplifier Current
RF = 1950MHz, High Side LO, IF = 190MHz, V
CC
= V
CCIF
= 3.3V
R1
I
CCIF
(mA)
G
C
(dB)
IIP3
(dBm)
P1dB
(dBm)
NF
(dB)
Open 202 8.7 25.4 10.6 9.8
4.7kΩ 184 8.5 25.2 10.8 9.8
2.2kΩ 170 8.4 24.8 10.9 9.7
1kΩ 151 8.1 24.4 11.1 9.8
RF = 2350MHz, Low Side LO, IF = 190MHz, V
CC
= V
CCIF
= 3.3V
R1
I
CCIF
(mA)
G
C
(dB)
IIP3
(dBm)
P1dB
(dBm)
NF
(dB)
Open 202 8.3 27.3 11.0 9.8
4.7kΩ 184 8.1 26.8 11.2 9.8
2.2kΩ 170 8.0 26.2 11.2 9.8
1kΩ 151 7.7 25.4 11.3 9.8
Low Power Mode
Both mixer channels can be set to low power mode us-
ing the I
SEL
pin. This allows flexibility to select a reduced
current mode of operation when lower RF performance is
acceptable, reducing power consumption by 37%. Figure
12 shows a simplified schematic of the I
SEL
pin interface.
When I
SEL
is set low (<0.3V), both channels operate at
nominal DC current. When I
SEL
is set high (>2.5V), the DC
current in both channels is reduced, thus reducing power
consumption. The performance in low power mode and
normal power mode are compared in Table 6.
Figure 12. I
SEL
Interface Schematic
Table 6. Performance Comparison Between Different Power Modes
RF = 1950MHz, High Side LO, IF = 190MHz, V
CC
= V
CCIF
= 3.3V
I
SEL
I
TOTAL
(mA)
G
C
(dB)
IIP3
(dBm)
P1dB
(dBm)
NF
(dB)
Low 401 8.7 25.4 10.6 9.8
High 252 7.4 21.2 10.9 10.2
RF = 2350MHz, Low Side LO, IF = 190MHz, V
CC
= V
CCIF
= 3.3V
I
SEL
I
TOTAL
(mA)
G
C
(dB)
IIP3
(dBm)
P1dB
(dBm)
NF
(dB)
Low 401 8.3 27.3 11.0 9.8
High 252 7.1 22.3 11.3 10.2
LTC5592
18
I
SEL
V
CCB
500Ω
V
CCA
5592 F13
19
BIAS A
BIAS B
LTC5592
17
5592fa
For more information www.linear.com/LTC5592
Enable Interface
Figure 13 shows a simplified schematic of the ENA pin
interface (ENB is identical). To enable channel A, the ENA
voltage must be greater than 2.5V. If the enable function
is not required, the enable pin can be connected directly
to V
CC
. The voltage at the enable pin should never exceed
the power supply voltage (V
CC
) by more than 0.3V. If this
should occur, the supply current could be sourced through
the ESD diode, potentially damaging the IC.
applicaTions inForMaTion
The Enable pins must be pulled high or low. If left float-
ing, the on/off state of the IC will be indeterminate. If a
three-state condition can exist at the enable pins, then a
pull-up or pull-down resistor must be used.
Supply Voltage Ramping
Fast ramping of the supply voltage can cause a current
glitch in the internal ESD protection cir
cuits. Depending on
the supply inductance, this could result in a supply volt
-
age transient that exceeds the maximum rating. A supply
voltage ramp time of greater than 1ms is recommended.
Spurious Output Levels
Mixer spurious output levels versus harmonics of
the RF
and LO are tabulated in Tables 7 and 8 for frequencies up
to 10GHz. The spur levels were measured on a standard
evalution board using the test circuit shown in Figure 1.
The spur frequencies can be calculated using the follow
-
ing equation:
f
SPUR
= (M • f
RF
) – (N • f
LO
)
Table 7. IF Output Spur Levels (dBc), High Side LO
(RF = 1950MHz, P
RF
= –3dBm, P
LO
= 0dBm, V
CC
= V
CCIF
= 3.3V, T
C
= 25°C)
N
M
0 1 2 3 4 5 6 7 8 9
0 – –45.2 –46.9 –68.4 –70.8 –75.3 –72.0 –82.0
1 –51.0 0 –64.4 –54.5 –68.1 –66.3 –74.9 –72.2
2 –80.0 –80.9 –60.6 * –81.4 * * * *
3 * –83.5 * –75.8 * * * * * *
4 * * * * * * * * * *
5 * * * * * * * * * *
6 * * * * * * * * * *
7 * * * * * * * * * *
8 * * * * * * * * *
9 * * * * * * * *
10 * * * * * * *
*Less than –90dBc
Table 8. IF Output Spur Levels (dBc), Low Side LO
(RF = 2350MHz, P
RF
= –3dBm, P
LO
= 0dBm, V
CC
= V
CCIF
= 3.3V, T
C
= 25°C)
N
M
0 1 2 3 4 5 6 7 8 9
0 – –44.9 –46.2 –69.9 –69.7 –78.0 –71.9
1 –50.7 0 –63.1 –45.7 –67.0 –68.9 –71.1 –72.2 *
2 –77.8 –78.7 –66.5 * –89.1 * * * * *
3 * * * –70.1 * * * * * *
4 * * * * * * * * * *
5 * * * * * * * * * *
6 * * * * * * * * * *
7 * * * * * * * * *
8 * * * * * * * *
9 * * * * * * *
10 * * * * * *
*Less than –90dBc
Figure 13. ENA Interface Schematic
LTC5592
17
ENA
500Ω
V
CCA
5592 F13
19
ESD
CLAMP
LTC5592
18
5592fa
For more information www.linear.com/LTC5592
UH Package
24-Lead Plastic QFN (5mm × 5mm)
(Reference LTC DWG # 05-08-1747 Rev A)
5.00 ± 0.10
5.00 ± 0.10
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.55 ± 0.10
23
1
2
24
BOTTOM VIEW—EXPOSED PAD
3.25 REF
3.20 ± 0.10
3.20 ± 0.10
0.75 ± 0.05
R = 0.150
TYP
0.30 ± 0.05
(UH24) QFN 0708 REV A
0.65 BSC
0.200 REF
0.00 – 0.05
0.75 ±0.05
3.25 REF
3.90 ±0.05
5.40 ±0.05
0.30 ± 0.05
PACKAGE OUTLINE
0.65 BSC
RECOMMENDED SOLDER PAD LAYOUT
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1 NOTCH
R = 0.30 TYP
OR 0.35 × 45°
CHAMFER
R = 0.05
TYP
3.20 ± 0.05
3.20 ± 0.05
UH Package
24-Lead Plastic QFN (5mm × 5mm)
(Reference LTC DWG # 05-08-1747 Rev A)
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

LTC5592IUH#PBF

Mfr. #:
Buy LTC5592IUH#PBF
Manufacturer:
Analog Devices Inc.
Description:
RF Mixer Dual 1.6GHz 2.7GHz High Linearity High Gain Passive Mixer
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet