NB7L32M
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4
Table 4. DC CHARACTERISTICS, CLOCK INPUTS, CML OUTPUTS V
CC
= 2.375 V to 3.465 V, V
EE
= 0 V,
T
A
= 40°C to +85°C
Symbol
Characteristic Min Typ Max Unit
I
CC
Power Supply Current (Note 3) 50 65 80 mA
V
OH
Output HIGH Voltage (Note 4) V
CC
40 V
CC
10 V
CC
mV
V
OL
Output LOW Voltage (Note 4) V
CC
500 V
CC
400 V
CC
300 mV
R
TOUT
Internal Output Termination Resistor 45 50 55
W
R
Temp
Coef
Internal I/O Termination Resistor Temperature Coefficient 6.38
mW/°C
DIFFERENTIAL CLK/CLK INPUT DRIVEN SINGLEENDED (see Figure 9 and 11)
V
th
Input Threshold Reference Voltage Range (Note 6) 1050 V
CC
mV
V
IH
Singleended Input HIGH Voltage V
th
+ 150 V
CC
+ 300 mV
V
IL
Singleended Input LOW Voltage V
EE
V
th
150 mV
DIFFERENTIAL CLK/CLK INPUTS DRIVEN DIFFERENTIALLY (see Figure 10 and 12)
V
IHD
Differential Input HIGH Voltage 1200 V
CC
+ 300 mV
V
ILD
Differential Input LOW Voltage V
EE
V
CC
75 mV
V
CMR
Input Common Mode Range (Differential Configuration, Note 7) 1125 V
CC
mV
V
ID
Differential Input Voltage (V
IHD
V
ILD
) 150 2500 mV
I
IH
Input HIGH Current CLK/CLK (VTCLK/R/VTCLK/R Open) 0 30 100
mA
I
IL
Input LOW Current CLK/CLK(VTCLK/R/VTCLK/R Open) 50 0 50
mA
R
TIN
Internal Input Termination Resistor 45 50 55
W
LVTTL/LVCMOS RESET INPUT
V
IH
Singleended Input HIGH Voltage 2000 V
CC
mV
V
IL
Singleended Input LOW Voltage V
EE
800 mV
I
IH
Input HIGH Current R 0 30 100
mA
I
IL
Input LOW Current R 0 10 100
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Input termination pins open and all outputs loaded with external R
L
= 50 W receiver termination resistor.
4. CML outputs require R
L
= 50 W receiver termination resistors to V
CC
for proper operation. (See Figure 8)
5. Input and output parameters vary 1:1 with V
CC
.
6. V
th
is applied to the complementary input when operating in singleended mode.
7. V
CMR(MIN)
varies 1:1 with V
EE
, V
CMR
max varies 1:1 with V
CC
. The V
CMR
range is referenced to the most positive side of the differential input
signal.
NB7L32M
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5
Table 6. AC CHARACTERISTICS V
CC
= 2.375 V to 3.465 V, V
EE
= 0 V (Note 8)
Symbol
Characteristic
40°C 255C 855C
Unit
Min Typ Max Min Typ Max Min Typ Max
V
OUTPP
Output Voltage Amplitude (@ V
INPP(MIN)
)
f
in
7 GHz
(See Figures 2, 3, 4, 5, and 6) f
in
12 GHz
190
160
330
320
190
160
330
320
190
160
330
320
mV
f
IN
Maximum Input Clock Frequency
(See Figure 2)
12 14 12 14 12 14 GHz
t
PLH
,
t
PHL
Propagation Delay to CLK to Q
Output Differential (See Figure 7) R to Q
130
200
155
240
200
300
130
200
155
240
200
300
130
200
155
260
200
300
ps
t
skew
Duty Cycle Skew (Note 9)
DevicetoDevice Skew (Note 12)
2
6
20
50
2
6
20
50
2
6
20
50
t
RR
Reset Recovery (See Figure 7) 300 135 300 135 300 135 ps
t
PW
Minimum Pulse Width R 500 210 500 210 500 210 ps
t
JITTER
Random Clock Jitter (RMS) f
in
7 GHz
(Note 11) f
in
= 12 GHz
0.13
0.14
0.5
0.5
0.13
0.14
0.5
0.5
0.13
0.14
0.5
0.5
ps
V
INPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 10)
150 2500 150 2500 150 2500 mV
t
r
t
f
Output Rise/Fall Times @ 1 GHz
(20% 80%)
30 45 30 45 30 45 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Measured by forcing V
INPP(MIN)
from a 50% duty cycle clock source. All loading with an external R
L
= 50 W to V
CC
. Input edge rates 40 ps
(20% 80%).
9. Duty cycle skew is measured between differential outputs using the deviations of the sum of Tpw and Tpw+ 1 GHz.
10.V
INPP(MAX)
cannot exceed V
CC
V
EE
. Input voltage swing is a singleended measurement operating in differential mode.
11. Additive RMS jitter with 50% duty cycle input clock signal.
12.Devicetodevice skew is measured between outputs under identical transition @ 1 GHz.
Figure 2. Output Voltage Amplitude (V
OUTPP
) versus Input Clock Frequency (f
OUT
) at
Ambient Temperature (V
INPP
= 150 mV)
INPUT CLOCK FREQUENCY (GHz)
0
50
100
150
200
250
300
350
400
450
2 4 6 8 10 12 14
OUTPUT VOLTAGE AMPLITUDE (mV)
V
CC
= 3.3 V
V
CC
= 2.5 V
0
NB7L32M
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6
TIME (190 ps/div)
Figure 3. Typical Output Waveform with
f
IN
= 7 GHz( V
CC
= 2.5 V, V
INPP
= 400 mV,
Room Temperature, V
OUTPP
= 357 mV,
t
r
= 33 ps, t
f
= 30 ps, f
OUT
= 3.499 GHz)
TIME (190 ps/div)
Figure 4. Typical Output Waveform with
f
IN
= 7 GHz(V
CC
= 3.3 V, V
INPP
= 400 mV, Room
Temperature, V
OUTPP
= 387 mV, t
r
= 32 ps,
t
f
= 29.8 ps, f
OUT
= 3.499 GHz)
TIME (52 ps/div)
Figure 5. Typical Output Waveform with
f
IN
= 14 GHz(V
CC
= 2.5 V, V
INPP
= 400 mV,
Room Temperature, V
OUTPP
= 292 mV,
t
r
= 25 ps, t
f
= 27 ps, f
OUT
= 7.01 GHz)
TIME (52 ps/div)
Figure 6. Typical Output Waveform with
f
IN
= 14 GHz(V
CC
= 3.3 V, V
INPP
= 400 mV,
Room Temperature, V
OUTPP
= 319 mV,
tr = 25 ps, t
f
= 26 ps, f
OUT
= 7.01 GHz)
VOLTAGE (50 mV/div)
VOLTAGE (50 mV/div)
VOLTAGE (50 mV/div)
VOLTAGE (50 mV/div)
Figure 7. AC Reference Measurement (Timing Diagram)
t
PHL
t
PLH
t
RR(MIN)
50% 50%
50% 50%
50%
Q
CLK
R
V
OUTPP
= V
OH
(Q) V
OL
(Q)
V
INPP
= V
IH
(CLK) V
IL
(CLK)

NB7L32MMNG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Clock Drivers & Distribution DIV BY 2 W/CML OUT
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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