UC3843AD

C URRENT MODE PWM CONTROLLER
UC184xA/284xA/384xA
PRODUCT DATABOOK 1996/1997
Copyright © 1995
Rev. 1.2a 10/25
4
P
RODUCTION DATA SHEET
ELECTRICAL CHARACTERISTICS (Con't.)
Under-Voltage Lockout Section
Parameter
Symbol
Test Conditions
Start Threshold x842A/4A
x843A/5A
Min. Operation Voltage After Turn-On x842A/4A
x843A/5A
UC384xA
Units
Min. Typ. Max. Min. Typ. Max.
UC184xA/284xA
15 16 17 14.5 16 17.5 V
7.8 8.4 9.0 7.8 8.4 9.0 V
9 10 11 8.5 10 11.5 V
7.0 7.6 8.2 7.0 7.6 8.2 V
PWM Section
Maximum Duty Cycle x842A/3A
x844A/5A
Minimum Duty Cycle
94 96 100 94 96 100 %
47 48 50 47 48 50 %
00%
Total Standby Section
Start-Up Current
Operating Supply Current I
CC
Zener Voltage V
Z
I
CC
= 25mA
0.3 0.5 0.3 0.5 mA
11 17 11 17 mA
30 35 30 35 V
BLOCK DIAGRAM
*
- V
CC
and V
C
are internally connected for 8 pin packages.
**
- POWER GROUND and GROUND are internally connected for 8 pin packages.
***
- Toggle flip flop used only in x844A and x845A series.
Notes: 2. These parameters, although guaranteed, are not 100% tested in
production.
3. Parameter measured at trip point of latch with V
VFB
= 0.
4. Gain defined as: A
VOL
= ; 0 V
ISENSE
0.8V.
5. Adjust V
CC
above the start threshold before setting at 15V.
6. Output frequency equals oscillator frequency for the UC1842A
and UC1843A. Output frequency is one half oscillator frequency
for the UC1844A and UC1845A.
7. "Temperature stability, sometimes referred to as average temperature
coefficient, is described by the equation:
Temp Stability =
V
REF
(max.) & V
REF
(min.) are the maximum & minimum reference
voltage measured over the appropriate temperature range. Note that
the extremes in voltage do not necessarily occur at the extremes in
temperature."
V
REF
(max.) - V
REF
(min.)
T
J
(max.) - T
J
(min.)
V
COMP
V
ISENSE
UVLO
S / R
5V
Ref
Internal
Bias
34V
Error Amp
1V
Current Sense
Comparator
PWM
Latch
S
R
R
Oscillator
2R
**
T***
V
REF
Good Logic
2.5V
UVLO
16V (1842A/4A)
8.4V (1843A/5A)
Hysteresis
6V (1842A/4A)
0.8V (1843A/5A)
COMP
CURRENT SENSE
V
FB
R
T
/C
T
GROUND
*
V
CC
V
REF
5.0V
50mA
V
C
*
OUTPUT
POWER GROUND
**
C URRENT MODE PWM CONTROLLER
UC184xA/284xA/384xA
PRODUCT DATABOOK 1996/1997
5
Copyright © 1995
Rev. 1.2a 10/25
P RODUCTION DATA SHEET
CHARACTERISTIC CURVES
FIGURE 1. OSCILLATOR FREQUENCY vs. TIMING
RESISTOR
300 3.0k 100k
0
100k
R
T
- (ohms)
Oscillator Frequency - (Hz)
10k
1M
1.0k 10.0k 30.0k
C
T
= 1nF
C
T
= 2.2nF
C
T
= 4.7nF
FIGURE 2. MAXIMUM DUTY CYCLE vs. TIMING RESISTOR
300 3.0k 100k
0
40.0
R
T
- (ohms)
Maximum Duty Cycle - (%)
20.0
60.0
1.0k 10.0k 30.0k
80.0
100.0
Note: Output drive frequency is half the oscillator frequency for
the UCx844A/5A devices.
8
4
5
V
REF
R
T
/C
T
GROUND
R
T
C
T
For R
T
> 5k, f »
1.72
R
T
C
T
C URRENT MODE PWM CONTROLLER
UC184xA/284xA/384xA
PRODUCT DATABOOK 1996/1997
Copyright © 1995
Rev. 1.2a 10/25
6
P
RODUCTION DATA SHEET
TYPICAL APPLICATION CIRCUITS
FIGURE 3. — CURRENT SENSE SPIKE SUPPRESSION
FIGURE 4. — MOSFET PARASITIC OSCILLATIONS
6
Q1
V
CC
DC BUS
5
R
S
R
1
UCx84xA
7
UCx84xA
3
5
6
7
R
S
C
Q1
V
CC
DC BUS
I
PK
I
PK(MAX)
=
1.0V
R
S
CHANGE
FIGURE 5. — EXTERNAL DUTY CYCLE CLAMP AND MULTI-UNIT SYNCHRONIZATION
A resistor (R
1
) in series with the MOSFET gate will reduce overshoot
& ringing caused by the MOSFET input capacitance and any
inductance in series with the gate drive. (Note: It is very important to
have a low inductance ground path to insure correct operation of the
I.C. This can be done by making the ground paths as short and as
wide as possible.)
The RC low pass filter will eliminate the leading edge current spike
caused by parasitics of Power MOSFET.
f =
(R
A
+ 2R
B
)C
1.44
f =
R
A
+ 2R
B
R
B Precision duty cycle limiting as well as synchronizing several parts is
possible with the above circuitry.
2
6
7
R
B
R
A
5 1
84
3
555
TIMER
4
5
8
To other
UCx84xA devices
0.01
UCx84xA

UC3843AD

Mfr. #:
Manufacturer:
Texas Instruments
Description:
Switching Controllers Current Mode
Lifecycle:
New from this manufacturer.
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