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LT3012HFE#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
LT3012
10
3012fd
APPLICATIONS INFORMATION
Voltage and temperature coeffi cients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress, simi-
lar to the way a piezoelectric accelerometer or microphone
works. For a ceramic capacitor the stress can be induced
by vibrations in the system or thermal transients.
Current Limit and Safe Operating Area Protection
Like many IC power regulators, the LT3012 has safe oper-
ating area protection. The safe operating area protection
decreases the current limit as the input voltage increases
and keeps the power transistor in a safe operating region.
The protection is designed to provide some output current
at all values of input voltage up to the device breakdown
(see curve of Current Limit vs Input Voltage in the Typical
Performance Characteristics).
The LT3012 is limited for operating conditions by maximum
junction temperature. While operating at maximum input
voltage, the output current range must be limited; when
operating at maximum output current, the input voltage
range must be limited. Device specifi cations will not apply
for all possible combinations of input voltage and output
current. Operating the LT3012 beyond the maximum junc-
tion temperature rating may impair the life of the device.
Thermal Considerations
The power handling capability of the device will be limited
by the maximum rated junction temperature of (125°C for
LT3012E, or 140°C for LT3012HFE). The power dissipated
by the device will be made up of two components:
1. Output current multiplied by the input/output voltage
differential: I
OUT
• (V
IN
– V
OUT
) and,
2. GND pin current multiplied by the input voltage:
I
GND
• V
IN
.
The GND pin current can be found by examining the GND
Pin Current curves in the Typical Performance Character-
istics. Power dissipation will be equal to the sum of the
two components listed above.
The LT3012 has internal thermal limiting designed to pro-
tect the device during overload conditions. For continuous
normal conditions the maximum junction temperature
rating of 125°C (E-Grade) or 140°C (H-Grade)must not
be exceeded. It is important to give careful consideration
to all sources of thermal resistance from junction to ambi-
ent. Additional heat sources mounted nearby must also
be considered.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with one ounce
copper.
Table 1. DFN Measured Thermal Resistance
COPPER AREA
TOPSIDE BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm 40°C/W
1000 sq mm 2500 sq mm 45°C/W
225 sq mm 2500 sq mm 50°C/W
100 sq mm 2500 sq mm 62°C/W
Table 2. TSSOP Measured Thermal Resistance
COPPER AREA
TOPSIDE BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm 40°C/W
1000 sq mm 2500 sq mm 45°C/W
225 sq mm 2500 sq mm 50°C/W
100 sq mm 2500 sq mm 62°C/W
The thermal resistance junction-to-case (θ
JC
), measured
at the exposed pad on the back of the die, is 16°C/W.
Continuous operation at large input/output voltage dif-
ferentials and maximum load current is not practical
due to thermal limitations. Transient operation at high
input/output differentials is possible. The approximate
thermal time constant for a 2500sq mm 3/32" FR-4 board
with maximum topside and backside area for one ounce
copper is 3 seconds. This time constant will increase as
more thermal mass is added (i.e., vias, larger board, and
other components).
LT3012
11
3012fd
For an application with transient high power peaks, average
power dissipation can be used for junction temperature
calculations as long as the pulse period is signifi cantly less
than the thermal time constant of the device and board.
Calculating Junction Temperature
Example 1: Given an output voltage of 5V, an input volt-
age range of 24V to 30V, an output current range of 0mA
to 50mA, and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
The power dissipated by the device will be equal to:
I
OUT(MAX)
• (V
IN(MAX)
– V
OUT
) + (I
GND
• V
IN(MAX)
)
where:
I
OUT(MAX)
= 50mA
V
IN(MAX)
= 30V
I
GND
at (I
OUT
= 50mA, V
IN
= 30V) = 1mA
So:
P = 50mA • (30V – 5V) + (1mA • 30V) = 1.28W
The thermal resistance will be in the range of 40°C/W to
62°C/W depending on the copper area. So the junction
temperature rise above ambient will be approximately
equal to:
1.31W • 50°C/W = 65.5°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
T
JMAX
= 50°C + 65.5°C = 115.5°C
Example 2: Given an output voltage of 5V, an input voltage
of 48V that rises to 72V for 5ms(max) out of every 100ms,
and a 5mA load that steps to 50mA for 50ms out of every
250ms, what is the junction temperature rise above ambi-
ent? Using a 500ms period (well under the time constant
of the board), power dissipation is as follows:
P1(48V in, 5mA load) = 5mA • (48V – 5V)
+ (200μA • 48V) = 0.23W
P2(48V in, 50mA load) = 50mA • (48V – 5V)
+ (1mA • 48V) = 2.20W
APPLICATIONS INFORMATION
P3(72V in, 5mA load) = 5mA • (72V – 5V)
+ (200μA • 72V) = 0.35W
P4(72V in, 50mA load) = 50mA • (72V – 5V)
+ (1mA • 72V) = 3.42W
Operation at the different power levels is as follows:
76% operation at P1, 19% for P2, 4% for P3, and
1% for P4.
P
EFF
= 76%(0.23W) + 19%(2.20W) + 4%(0.35W)
+ 1%(3.42W) = 0.64W
With a thermal resistance in the range of 40°C/W to
62°C/W, this translates to a junction temperature rise
above ambient of 26°C to 38°C.
High Temperature Operation
Care must be taken when designing LT3012 applications to
operate at high ambient temperatures. The LT3012 works
at elevated temperatures but erratic operation can occur
due to unforeseen variations in external components. Some
tantalum capacitors are available for high temperature
operation, but ESR is often several ohms; capacitor ESR
above 3Ω is unsuitable for use with the LT3012. Ceramic
capacitor manufacturers (Murata, AVX, TDK, and Vishay
Vitramon at this writing) now offer ceramic capacitors that
are rated to 150°C using an X8R dielectric. Device instability
will occur if output capacitor value and ESR are outside
design limits at elevated temperature and operating DC
voltage bias (see information on capacitor characteristics
under Output Capacitance and Transient Response). Check
each passive component for absolute value and voltage
ratings over the operating temperature range.
Leakages in capacitors or from solder fl ux left after
insuficient board cleaning adversely affects low
quiescent current operation. The output voltage resistor
divider should use a maximum bottom resistor value of
124k to compensate for high temperature leakage, setting
divider current to 10μA. Consider junction temperature
increase due to power dissipation in both the junction and
nearby components to ensure maximum specifi cations are
not violated for the device or external components.
LT3012
12
3012fd
APPLICATIONS INFORMATION
Protection Features
The LT3012 incorporates several protection features which
make it ideal for use in battery-powered circuits. In ad-
dition to the normal protection features associated with
monolithic regulators, such as current limiting and thermal
limiting, the device is protected against reverse-input volt-
ages, and reverse voltages from output to input.
Like many IC power regulators, the LT3012 has safe operat-
ing area protection. The safe area protection decreases the
current limit as input voltage increases and keeps the power
transistor inside a safe operating region for all values of
input voltage. The protection is designed to provide some
output current at all values of input voltage up to the device
breakdown. The SOA protection circuitry for the LT3012
uses a current generated when the input voltage exceeds
25V to decrease current limit. This current shows up as
additional quiescent current for input voltages above 25V.
This increase in quiescent current occurs both in normal
operation and in shutdown (see curve of Quiescent Current
in the Typical Performance Characteristics).
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal opera-
tion, the junction temperature should not exceed 125°C
(LT3012E) or 140°C (LT3012HFE).
The input of the device will withstand reverse voltages of
80V. No negative voltage will appear at the output. The
device will protect both itself and the load. This provides
protection against batteries which can be plugged in
backward.
The ADJ pin of the device can be pulled above or below
ground by as much as 7V without damaging the device.
If the input is left open circuit or grounded, the ADJ pin
will act like an open circuit when pulled below ground,
and like a large resistor (typically 100k) in series with a
diode when pulled above ground. If the input is powered
by a voltage source, pulling the ADJ pin below the refer-
ence voltage will cause the device to current limit. This
will cause the output to go to a unregulated high voltage.
Pulling the ADJ pin above the reference voltage will turn
off all output current.
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp volt-
age if the output is pulled high, the ADJ pin input current
must be limited to less than 5mA. For example, a resistor
divider is used to provide a regulated 1.5V output from the
1.24V reference when the output is forced to 60V. The top
resistor of the resistor divider must be chosen to limit the
current into the ADJ pin to less than 5mA when the ADJ
pin is at 7V. The 53V difference between the OUT and ADJ
pins divided by the 5mA maximum current into the ADJ
pin yields a minimum top resistor value of 10.6k.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled
to ground, pulled to some intermediate voltage, or is left
open circuit. Current fl ow back into the output will follow
the curve shown in Figure 4. The rise in reverse output
current above 7V occurs from the breakdown of the 7V
clamp on the ADJ pin. With a resistor divider on the
regulator output, this current will be reduced depending
on the size of the resistor divider.
Figure 4. Reverse Output Current
When the IN pin of the LT3012 is forced below the OUT
pin or the OUT pin is pulled above the IN pin, input cur-
rent will typically drop to less than 2μA. This can happen
if the input of the LT3012 is connected to a discharged
(low voltage) battery and the output is held up by either
a backup battery or a second regulator circuit. The state
of the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.
OUTPUT VOLTAGE (V)
0
REVERSE OUTPUT CURRENT (μA)
120
160
200
8
3012 F04
80
40
100
140
180
60
20
0
21
43
67 9
5
10
ADJ
PIN CLAMP
(SEE ABOVE)
T
J
= 25°C
V
IN
= 0V
V
OUT
= V
ADJ
CURRENT FLOWS
INTO OUTPUT PIN
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

LT3012HFE#PBF

Mfr. #:
Buy LT3012HFE#PBF
Manufacturer:
Analog Devices / Linear Technology
Description:
LDO Voltage Regulators 80Vin, 250mA. LDO in TSSOP
Lifecycle:
New from this manufacturer.
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