9
FN7102.7
May 8, 2006
Detailed Description
The EL7566 is a 6A capable buck regulator operating from
an input voltage range of 3V to 6V. The duty cycle can be
adjusted from 0% to 100% allowing for a wide range of
programmable output voltages. Patented on-chip
resistorless current-sensing enables current mode control
for excellent step load response. Overcurrent, Overvoltage,
input Undervoltage, and thermal protection is integrated
along with soft-start and power-up sequencing features to
produce an overall robust power solution for general
purpose applications.
EL7566DRE vs. EL7566AIRE
The EL7566AIRE includes the following feature changes
from the EL7566DRE:
• Up to 6A Current Sinking Capability
• Expanded Temperature Range: -40
o
C to 85
o
C
• No Overvoltage Protection
Start-Up
The EL7566 employs a digital soft-start feature to suppress
the in-rush current needed to charge the output capacitance
and smoothly ramp the output voltage to regulation (See
Figure 12). The normal start-up process begins when the
input voltage reaches the rising POR threshold (~2.8V) and
EN pin is transitioned HIGH by an internal 2.5µA current
source. The output voltage is then digitally ramped to
regulation over a 2ms period. The 2ms soft start-up time can
be extended if needed by configuring the STP and STN pins.
(refer to Full Start-Up Control section).
If the input voltage is ramped slowly, soft-start may be
initiated before the input supply has reached regulation. The
lower input voltage will have increased current demand
during start-up and may risk an overcurrent event. To
prevent such an event from occurring, a capacitor can be
placed from the EN pin to GND to program a delay between
when the rising POR threshold for VIN is met and when soft-
start begins. The programmable delay time, T
D
, is governed
by Equation 1.
where:
•C
EN
is the capacitance at EN pin
•V
EN_HI
is the EN input high level (function of V
DD
voltage,
see Figure 5)
•I
EN
is the EN pin pull-up current, nominal 2.5µA
Steady-State Operation
Under all steady-state conditions the converter will operate
in fixed frequency continuous-conduction mode. For fast
transient response and ease of controllability, a peak
current-mode control method is employed. The inductor
current is sensed from the upper PMOS. This current signal
serves as the ramp to the PWM comparator and is compared
against the difference signal generated by the
transconductance error amplifier. Slope compensation for
the ramp is used to allow for 100% duty cycle operation (see
Figure 20). The pulse-width modulated square wave output
of the PWM comparator is amplified and serves as the gate
drive signals for the switching power FETs.
100% DUTY RATIO
EL7566 uses CMOS as internal synchronous power
switches. The upper and lower switches are PMOS and
NMOS respectively. The upper PMOS saves the need for a
boot capacitor normally seen in NMOS/NMOS half-bridges.
FIGURE 18. ADJUSTABLE START-UP FIGURE 19. TRACKING START-UP
Waveforms
V
IN
= V
D
= 5V, V
O
= 2.5V, I
O
= 6A, f
S
= 500kHz, L = 2.7µH, C
IN
= 100µF, C
OUT
= 150µF, T
A
= 25°C unless otherwise noted. (Continued)
V
IN
(5V/DIV)
I
IN
(2A/DIV)
V
O
(2V/DIV)
PG
5ms/DIV
V
IN
(5V/DIV)
V
O1
=2.5V
V
O2
=1.8V
5ms/DIV
T
D
C
EN
V
EN_HI
I
EN
--------------------
×=
EL7566
