© 2000 Fairchild Semiconductor Corporation DS006193 www.fairchildsemi.com
September 1986
Revised February 2000
DM74ALS38A Quadruple 2-Input NAND Buffer with Open-Collector Outputs
DM74ALS38A
Quadruple 2-Input NAND Buffer
with Open-Collector Outputs
General Description
This device contains four independent gates, each of which
performs the logic NAND function. The open-collector out-
puts require external pull-up resistors for proper logical
operation.
Pull-Up Resistor Equations
Where: N
1
(I
OH
) = total maximum output HIGH current
for all outputs tied to pull-up resistor
N
2
(I
IH
) = total maximum input HIGH current
for all inputs tied to pull-up resistor
N
3
(I
IL
) = total maximum input LOW current for
all inputs tied to pull-up resistor
Features
■ Switching specifications at 50 pF
■ Switching specifications guaranteed over full tempera-
ture and V
CC
range
■ Advanced oxide-isolated, ion-implanted Schottky TTL
process
■ Functionally and pin for pin compatible with LS TTL
counterpart
■ Improved AC performance over LS38
■ Improved line receiving characteristics
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram Function Table
Y = AB
H = HIGH Logic Level
L = LOW Logic Level
Order Number Package Number Package Description
DM74ALS38AM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74ALS38AN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs Output
ABY
LLH
LHH
HLH
HHL