Ordering information scheme EMIF06-VID01F2
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2 Ordering information scheme
Figure 8. Ordering information scheme
3 Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK
®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the inner box label, in compliance with JEDEC
Standard JESD97. The maximum ratings related to soldering conditions are also marked on
the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at
www.st.com.
Figure 9. Flip Chip package dimensions
EMIF yy - xxx zz Fx
EMI Filter
Number of lines
Information
Package
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
F = Flip Chip
x = 2: Lead-free, pitch = 500 µm, bump = 315 µm
2.92 mm ± 50 µm
1.29 mm ± 50 µm
435 µm ± 50
315 µm ± 50
01µm ± 50
500 µm ± 50
250 µm ± 50
210 µm
210 µm
650 µm ± 65
