AD848SQ/883B

REV. B
–3–
AD849J AD849A/S
Model Conditions V
S
Min Typ Max Min Typ Max Units
INPUT OFFSET VOLTAGE
1
±5 V 0.3 1 0.1 0.75 mV
±15 V 0.3 1 0.1 0.75 mV
T
MIN
to T
MAX
±5 V 1.3 1.0 mV
±15 V 1.3 1.0 mV
Offset Drift ±5 V, ±15 V 2 2 µV/°C
INPUT BIAS CURRENT ±5 V, ±15 V 3.3 6.6 3.3 6.6/5 µA
T
MIN
to T
MAX
±5 V, ±15 V 7.2 7.5 µA
INPUT OFFSET CURRENT ±5 V, ±15 V 50 300 50 300 nA
T
MIN
to T
MAX
±5 V, ±15 V 400 400 nA
Offset Current Drift ±5 V, ±15 V 0.3 0.3 nA/°C
OPEN LOOP GAIN V
O
= ±2.5 V ±5V
R
LOAD
= 500 30 50 30 50 V/mV
T
MIN
to T
MAX
20 20/15 V/mV
R
LOAD
= 150 32 32 V/mV
V
OUT
= ±10 V ±15 V
R
LOAD
= 1 k 45 85 45 85 V/mV
T
MIN
to T
MAX
30 30/25 V/mV
DYNAMIC PERFORMANCE
Gain Bandwidth A
VCL
25 ±5 V 520 520 MHz
±15 V 725 725 MHz
Full Power Bandwidth
2
V
O
= 2 V p-p,
R
L
= 500 Ω±5 V 20 20 MHz
V
O
= 20 V p-p,
R
L
= 1 kΩ±15 V 4.7 4.7 MHz
Slew Rate ±5 V 200 200 V/µs
R
LOAD
= 1 kΩ±15 V 225 300 225 300 V/µs
Settling Time to 0.1% –2.5 V to +2.5 V ±5 V 65 65 ns
10 V Step, A
V
= –24 ±15 V 80 80 ns
Phase Margin C
LOAD
= 10 pF ±15 V
R
LOAD
= 1 k 60 60 Degrees
DIFFERENTIAL GAIN f = 4.4 MHz ±15 V 0.08 0.08 %
DIFFERENTIAL PHASE f = 4.4 MHz ±15 V 0.04 0.04 Degrees
COMMON-MODE REJECTION V
CM
= ±2.5 V ±5 V 100 115 100 115 dB
V
CM
= ±12 V ±15 V 100 115 100 115 dB
T
MIN
to T
MAX
96 96 dB
POWER SUPPLY REJECTION V
S
= ±4.5 V to ±18 V 98 120 98 120 dB
T
MIN
to T
MAX
94 94 dB
INPUT VOLTAGE NOISE f = 10 kHz ±15 V 3 3 nV/Hz
INPUT CURRENT NOISE f = 10 kHz ±15 V 1.5 1.5 pA/Hz
INPUT COMMON-MODE
VOLTAGE RANGE ±5 V +4.3 +4.3 V
–3.4 –3.4 V
±15 V +14.3 +14.3 V
–13.4 –13.4 V
OUTPUT VOLTAGE SWING R
LOAD
= 500 Ω±5 V 3.0 3.6 3.0 3.6 ±V
R
LOAD
= 150 Ω±5V 2.5 3 2.5 3 ±V
R
LOAD
= 50 Ω±5 V 1.4 1.4 ±V
R
LOAD
= 1 kΩ±15 V 12 12 ±V
R
LOAD
= 500 Ω±15 V 10 10 ±V
SHORT CIRCUIT CURRENT ±15 V 32 32 mA
INPUT RESISTANCE 25 25 k
INPUT CAPACITANCE 1.5 1.5 pF
OUTPUT RESISTANCE Open Loop 15 15
POWER SUPPLY
Operating Range 64.5 618 64.5 618 V
Quiescent Current ±5 V 4.8 6.0 4.8 6.0 mA
T
MIN
to T
MAX
7.4 7.4/8.3 mA
±15 V 5.1 6.8 5.1 6.8 mA
T
MIN
to T
MAX
8.0 8.0/9.0 mA
NOTES
1
Input offset voltage specifications are guaranteed after 5 minutes at T
A
= +25°C.
2
Full power bandwidth = slew rate/2 π V
PEAK
. Refer to Figure 1.
All min and max specifications are guaranteed. Specifications in boldface are tested on all production units at final electrical test. All others are guaranteed but not necessarily tested.
Specifications subject to change without notice.
AD848/AD849
AD848/AD849
REV. B
–4–
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Internal Power Dissipation
2
Plastic (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Watts
Small Outline (R) . . . . . . . . . . . . . . . . . . . . . . . . . 0.9 Watts
Cerdip (Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Watts
LCC (E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8 Watts
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ±6 V
Storage Temperature Range (Q) . . . . . . . . –65°C to +150°C
(N, R) . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +175°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . +300°C
NOTES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause per-
manent damage to the device. This is a stress rating only, and functional opera-
tion of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2
LCC: θ
JA
= 150°C/Watt
Mini-DIP Package: θ
JA
= 110°C/Watt
Cerdip Package: θ
JA
= 110°C/Watt
Small Outline Package: θ
JA
= 155°C/Watt.
METALIZATION PHOTOGRAPH
Contact factory for latest dimensions. (AD848 and AD849 are identical
except for the part number in the upper right.)
Dimensions shown in inches and (mm).
ORDERING GUIDE
Gain Min Max
Bandwidth Stable Offset Voltage Temperature Package
Model MHz Gain mV Range – 8C Option
1
AD848JN 175 5 1 0 to +70 N-8
AD848JR
2
175 5 1 0 to +70 R-8
AD848JCHIPS 175 5 1 0 to +70 Die Form
AD848AQ 175 5 1 –40 to +85 Q-8
AD848SQ 175 5 1 –55 to +125 Q-8
AD848SQ/883B 175 5 1 –55 to +125 Q-8
AD848SE/883B 175 5 1 –55 to +125 E-20A
AD849JN 725 25 1 0 to +70 N-8
AD849JR
2
725 25 1 0 to +70 R-8
AD849AQ 725 25 0.75 –40 to +85 Q-8
AD849SQ 725 25 0.75 –55 to +125 Q-8
AD849SQ/883B 725 25 0.75 –55 to +125 Q-8
AD847J/A/S 50 1 1 See AD847 Data Sheet
NOTES
1
E = LCC; N = Plastic DIP; Q = Cerdip; R = Small Outline IC (SOIC).
2
Plastic SOIC (R) available in tape and reel. AD848 available in S grade chips. AD849 available in J and S grade
chips.
AD848/AD849
REV. B
–5–
Figure 1. AD848 Inverting Amplifier Configuration
Figure 1a. AD848 Large Signal Pulse Response
Figure 1b. AD848 Small Signal Pulse Response
OFFSET NULLING
The input voltage of the AD848 and AD849 are very low for
high speed op amps, but if additional nulling is required, the
circuit shown in Figure 3 can be used.
For high performance circuits it is recommended that a resistor
(R
B
in Figures 1 and 2) be used to reduce bias current errors by
matching the impedance at each input. The offset voltage error
caused by the input currents is decreased by more than an order
of magnitude.
Figure 2. AD849 Inverting Amplifier Configuration
Figure 2a. AD849 Large Signal Pulse Response
Figure 2b. AD849 Small Signal Pulse Response
Figure 3. Offset Nulling

AD848SQ/883B

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
High Speed Operational Amplifiers High Spd Low Pwr Monolithic 5 Stable
Lifecycle:
New from this manufacturer.
Delivery:
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