LTC3443
4
3443fa
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Active Quiescent Current
TEMPERATURE (°C)
–55
520
V
IN
+ V
OUT
CURRENT (μA)
540
560
580
600
–25 5 35 65
3443 G07
95 125
620
530
550
570
590
610
630
V
IN
= V
OUT
= 3.6V
TEMPERATURE (°C)
–55
FEEDBACK VOLTAGE (V)
65
1.241
3443 G08
5
–25
95
35 125
1.236
1.231
1.226
1.221
1.216
1.211
1.206
1.201
1.196
V
IN
= V
OUT
= 3.6V
TEMPERATURE (°C)
–55
10
V
IN
+ V
OUT
CURRENT (μA)
20
30
40
50
–25 5 35 65
3443 G09
95 125
V
IN
= V
OUT
= 3.6V
Feedback Voltage
Burst Mode Quiescent Current
Feedback Voltage Line Regulation Error Amp Source Current
TEMPERATURE (°C)
–55
60
LINE REGULATION (dB)
70
80
90
–25 5 35 65
3443 G10
95
125
V
IN
= V
OUT
= 2.4V TO 5.5V
TEMPERATURE (°C)
–55
5
EA SOURCE CURRENT (μA)
10
15
20
–25 5 35 65
3443 G11
95
125
V
IN
= V
OUT
= 3.6V
Switch Pins Before Entering
Boost Mode
SW1
2V/DIV
V
IN
= 3V 50ns/DIV 3443 G06
V
OUT
= 3.3V
I
OUT
= 500mA
SW2
2V/DIV
(T
A
= 25°C unless otherwise specified)
Switch Pins in Buck-Boost Mode
SW1
2V/DIV
V
IN
= 3.3V 50ns/DIV 3443 G04
V
OUT
= 3.3V
I
OUT
= 500mA
SW2
2V/DIV
SW1
2V/DIV
V
IN
= 4.2V 50ns/DIV 3443 G05
V
OUT
= 3.3V
I
OUT
= 500mA
SW2
2V/DIV
Switch Pins Entering
Buck-Boost Mode
LTC3443
5
3443fa
TYPICAL PERFOR A CE CHARACTERISTICS
UW
PMOS R
DS(ON)
Minimum Start Voltage
TEMPERATURE (°C)
–50
0.05
PMOS R
DS(ON)
(Ω)
0.07
0.09
0.11
–25
5
35 65
3443 G16
95
0.13
0.15
125
V
IN
= V
OUT
= 3.6V
SWITCHES A AND D
TEMPERATURE (°C)
–55
2.10
MINIMUM START VOLTAGE (V)
2.15
2.20
2.25
2.30
–25 5 35 65
3443 G17
95 125
UU
U
PI FU CTIO S
SHDN/SS (Pin 1): Combined Soft-Start and Shutdown.
Applied voltage < 0.4V shuts down the IC. Tie to >1.4V to
enable the IC and >2.4V to ensure the error amp is not
clamped from soft-start. An RC from the shutdown com-
mand signal to this pin will provide a soft-start function by
limiting the rise time of the V
C
pin.
GND (Pin 2): Signal Ground for the IC.
PGND (Pins 3, 6, 13 Exposed Pad): Power Ground for the
Internal NMOS Power Switches. The exposed pad must be
soldered to PCB ground for optimal thermal performance.
SW1 (Pin 4): Switch pin where the internal switches A and
B are connected. Connect inductor from SW1 to SW2. An
optional Schottky diode can be connected from this SW1
to ground. Minimize trace length to keep EMI down.
SW2 (Pin 5): Switch pin where the internal switches C
and D are connected. An optional Schottky diode can be
connected from SW2 to V
OUT
(it is required where
V
OUT
> 4.3V). Minimize trace length to keep EMI down.
MODE/SYNC (Pin 7): Burst Mode Select and Oscillator
Synchronization.
MODE/SYNC = High: Enable Burst Mode Operation.
During the period where the IC is supplying energy to
the output, the inductor peak inductor current will reach
0.8A and return to zero current on each cycle. In Burst
Mode operation the operation is variable frequency,
which provides a significant efficiency improvement at
light loads. The Burst Mode operation will continue until
the pin is driven low.
NMOS R
DS(ON)
TEMPERATURE (°C)
–55
0.05
NMOS R
DS(ON)
(Ω)
0.07
0.09
0.11
0.13
0.15
–25
53565
3443 G15
95 125
V
IN
= V
OUT
= 3.6V
SWITCHES B AND C
(T
A
= 25°C unless otherwise specified)
Error Amp Sink Current
TEMPERATURE (°C)
–55
200
EA SINK CURRENT (μA)
250
300
350
400
–25 5 35 65
3443 G12
95 125
V
IN
= V
OUT
= 3.6V
Output Frequency Current Limit
TEMPERATURE (°C)
–55
0.50
FREQUENCY (MHz)
0.55
0.60
0.65
0.70
–25 5 35 65
3443 G13
95 125
V
IN
= V
OUT
= 3.6V
TEMPERATURE (°C)
–55
2.8
CURRENT LIMIT (A)
3.0
3.2
3.4
–25 5 35 65
3443 G14
95
125
V
IN
= V
OUT
= 3.6V
LTC3443
6
3443fa
BLOCK DIAGRA
W
+
+
+
+
+
+
9
10
PWM
LOGIC
AND
OUTPUT
PHASING
GATE
DRIVERS
AND
ANTICROSS
CONDUCTION
Burst Mode
OPERATION
CONTROL
5μs DELAY
GND
UVLO
4A
2.4V
SLEEP
MODE/SYNC
1 = Burst Mode
OPERATION
0 = FIXED FREQUENCY
600kHz
OSC
SYNC
SUPPLY
CURRENT
LIMIT
SW A
SW1
PV
IN
V
IN
V
CC
INTERNAL
SW2
V
IN
2.4V TO 5.5V
SW D
I
SENSE
AMP
ERROR
AMP
1.22V
CLAMP
REVERSE
CURRENT
LIMIT
SW B
3.2A
AVERAGE
CURRENT LIMIT
SW C
PGND
0.4A
7
2
1
+
4 5
PGND
6
V
OUT
8
FB
12
V
C
11
SHDN/SS
SHUTDOWN
R
SS
V
IN
R2
C
SS
R1
3443 BD
V
OUT
2.4V TO 5.25V
PWM
COMPARATORS
+
1
100
g
m
= k
THERMAL
SHUTDOWN
÷2
CLAMP
MODE
UU
U
PI FU CTIO S
MODE/SYNC = Low: Disable Burst Mode operation and
maintain low noise, constant frequency operation .
MODE/SYNC = External CLK : Synchronization of the
internal oscillator and Burst Mode operation disable. A
clock pulse width between 100ns and 2μs and a clock
frequency between 1.38MHz and 2.4MHz (twice the
desired frequency) is required to synchronize the IC.
f
OSC
= f
SYNC
/2
V
OUT
(Pin 8): Output of the Synchronous Rectifier. A filter
capacitor is placed from V
OUT
to GND. A ceramic bypass
capacitor is recommended as close to the V
OUT
and GND
pins as possible.
PV
IN
(Pin 9): Power V
IN
Supply Pin. A 10μF ceramic capaci-
tor is recommended as close to the PV
IN
and PGND pins
as possible
V
IN
(Pin 10): Input Supply Pin. Internal V
CC
for the IC.
V
C
(Pin 11): Error Amp Output. A frequency compensation
network is connected from this pin to the FB pin to
compensate the loop. See the section “Compensating the
Feedback Loop” for guidelines.
FB (Pin 12): Feedback Pin. Connect resistor divider tap
here. The output voltage can be adjusted from 2.4V to
5.25V. The feedback reference voltage is typically 1.22V.

LTC3443EDE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Hi C uP 600kHz Sync Buck-Boost DC/DC Con
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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