AD8220-EP Enhanced Product
Rev. A | Page 4 of 11
Parameter Test Conditions/Comments Min Typ Max Unit
Settling Time 0.001% 10 V step, T
A
G = 1 6 µs
G = 10 4.6 µs
G = 100 9.6 µs
Slew Rate
G = 1 to 100 T
A
2 V/µs
GAIN G = 1 + (49.4 kΩ/R
G
), T
OPR
Gain Range 1 1000 V/V
Gain Error V
OUT
= ±10 V
G = 1 −0.1 +0.1 %
G = 10 −0.8 +0.8 %
G = 100 −0.8 +0.8 %
Gain Nonlinearity V
OUT
= −10 V to +10 V, T
A
G = 1 R
L
= 10 kΩ 10 15 ppm
G = 10 R
L
= 10 kΩ 5 10 ppm
G = 100 R
L
= 10 kΩ 30 60 ppm
L
G = 1 R
L
= 2 kΩ 10 15 ppm
G = 10 R
L
= 2 kΩ 10 15 ppm
G = 100 R
L
= 2 kΩ 50 75 ppm
Gain vs. Temperature
G = 1 3 10 ppm/°C
G > 10 −50 ppm/°C
INPUT
Impedance (Pin to Ground)
2
T
A
10
4
||5 GΩ||pF
Input Operating Voltage Range
3
V
S
= ±2.25 V to ±18 V for dual supplies, T
A
−V
S
− 0.1 +V
S
− 2 V
Over Temperature T
OPR
−V
S
− 0.1 +V
S
− 2.2 V
Output Swing R
L
= 10 kΩ, T
A
−14.7 +14.7 V
Over Temperature T
OPR
−14.3 +14.3 V
Short-Circuit Current T
A
15 mA
REFERENCE INPUT T
A
R
IN
40 kΩ
I
IN
V
IN
+, V
IN
− = 0 V 70 µA
Voltage Range +V
S
V
Gain to Output T
A
1 ± 0.0001 V/V
POWER SUPPLY
Operating Range
4
±2.25
±18 V
Quiescent Current T
A
750 µA
Over Temperature T
OPR
1000 µA
TEMPERATURE RANGE
For Specified Performance T
OPR
−55 +125 °C
1
When the output sinks more than 4 mA, use a 47 pF capacitor in parallel with the load to prevent ringing. Otherwise, use a larger load, such as 10 kΩ.
2
Differential and common-mode input impedance (Z
DIFF
and Z
CM
) can be calculated from the pin impedance (Z
PIN
): Z
DIFF
= 2(Z
PIN
); Z
CM
= Z
PIN
/2.
3
The AD8220-EP can operate up to a diode drop below the negative supply but the bias current increases sharply. The input voltage range reflects the maximum
allowable voltage where the input bias current is within the specification.
4
At the minimum supply voltage of ±2.25 V, ensure that the input common-mode voltage is within the input voltage range specification.
