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843256BGILF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
REVISION B 12/18/14
843256 DATA SHEET
7 FemtoClock
®
Crystal-to-3.3V LVPECL
Frequency Synthesizer With/Integrated Fanout Buffer
PARAMETER MEASUREMENT INFORMATION
OUTPUT SKEW
3.3V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
RMS PHASE JITTER
OUTPUT RISE/FALL TIME
FemtoClock
®
Crystal-to-3.3V LVPECL
Frequency Synthesizer With/Integrated Fanout Buffer
843256 DATA SHEET
8 REVISION B 12/18/14
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. The 843256 provides separate power
supplies to isolate any high switching noise from the outputs to the
internal PLL. V
CC
, V
CCA
, and V
CCO
should be individually connected to
the power supply plane through vias, and bypass capacitors should
be used for each pin. To achieve optimum jitter performance, power
supply isolation is required. Figure 1 illustrates how a 10Ω resistor
along with a 10μF and a .01μF bypass capacitor should be con-
nected to each V
CCA
pin.
FIGURE 1. POWER SUPPLY FILTERING
10Ω
V
CCA
10μF
.01μF
3.3V
.01μF
V
CC
INPUTS:
LVCMOS CONTROL PINS
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVPECL OUTPUTS
All unused LVPECL outputs can be left fl oating. We recommend
that there is no trace attached. Both sides of the differential output
pair should either be left fl oating or terminated.
FIGURE 2. CRYSTAL INPUt INTERFACE
C1
18p
X1
18pF Parallel Crystal
C2
22p
XTAL_IN
XTAL_OUT
CRYSTAL INPUT INTERFACE
The 843256 has been characterized with 18pF parallel resonant
crystals. The capacitor values shown in Figure 2 below were
determined using an 18pF parallel resonant crystal and
were chosen to minimize the ppm error.
REVISION B 12/18/14
843256 DATA SHEET
9 FemtoClock
®
Crystal-to-3.3V LVPECL
Frequency Synthesizer With/Integrated Fanout Buffer
LVCMOS TO XTAL INTERFACE
The XTAL_IN input can accept a single-ended LVCMOS signal
through an AC coupling capacitor. A general interface diagram
is shown in Figure 3 The XTAL_OUT pin can be left fl oating. The
input edge rate can be as slow as 10ns. For LVCMOS inputs, it is
recommended that the amplitude be reduced from full swing to
half swing in order to prevent signal interference with the power
rail and to reduce noise. This confi guration requires that the output
FIGURE 3. GENERAL DIAGRAM FOR LVCMOS DRIVER TO XTAL INPUT INTERFACE
impedance of the driver (Ro) plus the series resistance (Rs) equals
the transmission line impedance. In addition, matched termination
at the crystal input will attenuate the signal in half. This can be done
in one of two ways. First, R1 and R2 in parallel should equal the
transmission line impedance. For most 50Ω applications, R1 and
R2 can be 100Ω. This can also be accomplished by removing R1
and making R2 50Ω.
R2
Zo = 50
VDD
Ro
Zo = Ro + Rs
R1
VDD
XTAL_IN
XTAL_OUT
.1uf
Rs
The clock layout topology shown below is a typical termination for
LVPECL outputs. The two different layouts mentioned are recom-
mended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that generate
ECL/LVPECL compatible outputs. Therefore, terminating resistors
(DC current path to ground) or current sources must be used for
functionality. These outputs are designed to drive 50Ω transmission
lines. Matched impedance techniques should be used to maximize
operating frequency and minimize signal distortion. Figures 4A
and 4B show two different layouts which are recommended only
as guidelines. Other suitable clock layouts may exist and it would
be recommended that the board designers simulate to guarantee
compatibility across all printed circuit and clock component process
variations.
TERMINATION FOR LVPECL OUTPUTS
FIGURE 4B. LVPECL OUTPUT TERMINATIONFIGURE 4A. LVPECL OUTPUT TERMINATION
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

843256BGILF

Mfr. #:
Buy 843256BGILF
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner 6 LVPECL OUT FEMTOCLOCK
Lifecycle:
New from this manufacturer.
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