ICS348
QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER EPROM CLOCK SYNTHESIZER
IDT™ / ICS™
QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER 6
ICS348 REV L 051310
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±5%, Ambient Temperature -40 to +85° C
Note 1: Measured with 15 pF load.
Note 2: Duty Cycle is configuration dependent. Most configurations are minimum 45% and maximum 55%.
Note 3: ICS test mode output occurs for first 170 clock cycles on CLK7 for each PLL powered up. PDTS
transition
high on select address change.
Thermal Characteristics
Parameter Symbol Conditions Min. Typ. Max. Units
Input Frequency F
IN
Fundamental Crystal 5 27 MHz
Input Clock 2 50 MHz
Output Frequency VDD=3.3 V 0.25 200 MHz
Output Rise Time t
OR
20% to 80%, Note 1 1 ns
Output Fall Time t
OF
80% to 20%, Note 1 1 ns
Duty Cycle Note 2 40 49-51 60 %
Output Frequency Synthesis
Error
Configuration Dependent TBD ppm
Power-up time PLL lock-time from
power-up, Note 3
310ms
PDTS
goes high until
stable CLK output, Note 3
0.22ms
One Sigma Clock Period Jitter Configuration Dependent 50 ps
Maximum Absolute Jitter t
ja
Deviation from Mean.
Configuration Dependent
+200 ps
Pin-to-Pin Skew Low Skew Outputs -250 250 ps
Parameter Symbol Conditions Min. Typ. Max. Units
Thermal Resistance Junction to
Ambient
θ
JA
Still air 135 ° C/W
θ
JA
1 m/s air flow 93 ° C/W
θ
JA
3 m/s air flow 78 ° C/W
Thermal Resistance Junction to Case θ
JC
60 ° C/W