74HC_HCT2G34_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 4 November 2013 8 of 15
NXP Semiconductors
74HC2G34-Q100; 74HCT2G34-Q100
Dual buffer gate
11. Dynamic characteristics
[1] t
pd
is the same as t
PLH
and t
PHL
[2] t
t
is the same as t
TLH
and t
THL
[3] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
(C
L
V
CC
2
f
o
) = sum of the outputs.
Table 9. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6
.
Symbol Parameter Conditions 25 C 40 C to +125 C Unit
Min Typ Max Min Max
(85 C)
Max
(125 C)
74HC2G34-Q100
t
pd
propagation delay nA to nY; see Figure 5
[1]
V
CC
= 2.0 V; C
L
= 50 pF - 29 75 - 95 125 ns
V
CC
= 4.5 V; C
L
= 50 pF - 9 15 - 19 25 ns
V
CC
= 6.0 V; C
L
= 50 pF - 8 13 - 16 20 ns
t
t
transition time nY; see Figure 5
[2]
V
CC
= 2.0 V; C
L
= 50 pF - 18 75 - 95 125 ns
V
CC
= 4.5 V; C
L
= 50 pF - 6 15 - 19 25 ns
V
CC
= 6.0 V; C
L
= 50 pF - 5 13 - 16 20 ns
C
PD
power dissipation
capacitance
V
I
= GND to V
CC
[3]
-10- - - -pF
74HCT2G34-Q100
t
pd
propagation delay nA to nY; see Figure 5
[1]
V
CC
= 4.5 V; C
L
= 50 pF - 10 18 - 23 29 ns
t
t
transition time nY; see Figure 5
[2]
V
CC
= 4.5 V; C
L
= 50 pF - 6 15 - 19 25 ns
C
PD
power dissipation
capacitance
V
I
= GND to V
CC
1.5 V
[3]
-9- - - -pF