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ISL29030AIROZ-EVALZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
ISL29030A
4
FN7722.2
November 12, 2012
DATA
PROX_0
Prox Measurement w/o Object in Path 1 2 Counts
DATA
PROX_F
Full Scale Prox ADC Code 255 Counts
DATA
PROX_1
Prox Measurement Result (Note 8) 35 46 57 Counts
t
r
Rise Time for IRDR Sink Current R
LOAD
= 15Ω at IRDR pin,
20% to 80%
500 ns
t
f
Fall time for IRDR Sink Current R
LOAD
= 15Ω at IRDR pin,
80% to 20%
500 ns
I
IRDR_0
IRDR Sink Current PROX_DR = 0; V
IRDR
= 0.5V 98 110 120 mA
I
IRDR_1
IRDR Sink Current PROX_DR = 1; V
IRDR
= 0.5V 220 mA
I
IRDR_LEAK
IRDR Leakage Current PROX_EN = 0; V
DD
= 3.63V (Note 9) -1 0.001 1 µA
V
IRDR
Acceptable Voltage Range on IRDR Pin Register bit PROX_DR = 0 0.5 4.3 V
t
PULSE
Net I
IRDR
On Time Per PROX Reading 100 µs
V
REF
Voltage of R
EXT
Pin 0.51 V
F
I
2
C
I
2
C Clock Rate Range 400 kHz
V
I
2
C
Supply Voltage Range for I
2
C Interface 1.7 3.63 V
V
IL
SCL and SDA Input Low Voltage 0.55 V
V
IH
SCL and SDA Input High Voltage 1.25 V
I
SDA
SDA Current Sinking Capability V
OL
= 0.4V 3 5mA
I
INT
INT Current Sinking Capability V
OL
= 0.4V 3 5mA
PSRR
IRDR
(ΔI
IRDR
)/(ΔV
IRDR
) PROX_DR = 0; V
IRDR
= 0.5V to 4.3V 4 mA/V
NOTES:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
7. An LED is used in production test. The LED irradiance is calibrated to produce the same DATA count against a fluorescent light source of the same lux
level.
8. An 850nm infrared LED is used to test PROX/IR sensitivity in an internal test mode.
9. Ability to guarantee I
IRDR
leakage of ~1nA is limited by test hardware.
10. For ALS applications under light-distorting glass, please see “ALS Range 1 Considerations” on page 10.
Electrical Specifications V
DD
= 3.0V, T
A
= +25°C, R
EXT
= 499kΩ 1% tolerance. Boldface limits apply over the operating
temperature range, -40°C to +85°C.
(Continued)
PARAMETER DESCRIPTION CONDITION
MIN
(Note 6) TYP
MAX
(Note 6) UNIT
I
2
C Electrical Specifications For SCL and SDA unless otherwise noted, V
DD
= 3V, T
A
= +25°C, R
EXT
= 499kΩ 1% tolerance
(Note
11). Boldface limits apply over the operating temperature range, -40°C to +85°C.
PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT
V
I
2
C
Supply Voltage Range for I
2
C Interface 1.7 3.63 V
f
SCL
SCL Clock Frequency 400 kHz
V
IL
SCL and SDA Input Low Voltage 0.55 V
V
IH
SCL and SDA Input High Voltage 1.25 V
V
hys
Hysteresis of Schmitt Trigger Input 0.05V
DD
V
V
OL
Low-level Output Voltage (Open-drain) at 4mA Sink
Current
0.4 V
I
i
Input Leakage for each SDA, SCL Pin -10 10 µA
t
SP
Pulse Width of Spikes that must be Suppressed by
the Input Filter
50 ns
t
AA
SCL Falling Edge to SDA Output Data Valid 900 ns
C
i
Capacitance for each SDA and SCL Pin 10 pF
ISL29030A
5
FN7722.2
November 12, 2012
t
HD:STA
Hold Time (Repeated) START Condition After this period, the first clock pulse is
generated
600 ns
t
LOW
LOW Period of the SCL Clock Measured at the 30% of VDD crossing 1300 ns
t
HIGH
HIGH period of the SCL Clock 600 ns
t
SU:STA
Set-up Time for a Repeated START Condition 600 ns
t
HD:DAT
Data Hold Time 30 ns
t
SU:DAT
Data Set-up Time 100 ns
t
R
Rise Time of both SDA and SCL Signals (Note 12) 20 +
0.1xC
b
ns
t
F
Fall Time of both SDA and SCL Signals (Note 12) 20 +
0.1xC
b
ns
t
SU:STO
Set-up Time for STOP Condition 600 ns
t
BUF
Bus Free Time Between a STOP and START
Condition
1300 ns
C
b
Capacitive Load for Each Bus Line 400 pF
R
pull-up
SDA and SCL system bus pull-up resistor Maximum is determined by t
R
and t
F
1 kΩ
t
VD;DAT
Data Valid Time 0.9 µs
t
VD:ACK
Data Valid Acknowledge Time 0.9 µs
V
nL
Noise Margin at the LOW Level 0.1V
DD
V
V
nH
Noise Margin at the HIGH Level 0.2V
DD
V
NOTES:
11. I
2
C limits are based on design/simulation and are not production tested.
12. C
b
is the capacitance of the bus in pF.
I
2
C Electrical Specifications For SCL and SDA unless otherwise noted, V
DD
= 3V, T
A
= +25°C, R
EXT
= 499kΩ 1% tolerance
(Note
11). Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT
FIGURE 1. I
2
C TIMING DIAGRAM
ISL29030A
6
FN7722.2
November 12, 2012
Register Map
There are ten 8-bit registers accessible via I
2
C. Registers 0x1 and 0x2 define the operation mode of the device. Registers 0x3 through 0x7
store the various ALS/IR/Prox thresholds which trigger interrupt events. Registers 0x8 through 0xA store the results of ALS/IR/Prox ADC
conversions.
Register Descriptions
TABLE 1. ISL29030A REGISTERS AND REGISTER BITS
ADDR REG NAME
BIT
7654321 0DEFAULT
0x00 (n/a) (Reserved) (n/a)
0x01 CONFIGURE PROX_EN PROX_SLP[2:0] PROX_DR ALS_EN ALS_RANGE ALSIR_MODE 0x00
0x02 INTERRUPT PROX_FLAG PROX_PRST[1:0] (Write 0) ALS_FLAG ALS_PRST[1:0] INT_CTRL 0x00
0x03 PROX_LT PROX_LT[7:0] 0x00
0x04 PROX_HT PROX_HT[7:0] 0xFF
0x05 ALSIR_TH1 ALSIR_LT[7:0] 0x00
0x06 ALSIR_TH2 ALSIR_HT[3:0] ALSIR_LT[11:8] 0xF0
0x07 ALSIR_TH3 ALSIR_HT[11:4] 0xFF
0x08 PROX_DATA PROX_DATA[7:0] 0x00
0x09 ALSIR_DT1 ALSIR_DATA[7:0] 0x00
0x0A ALSIR_DT2 (Unused) ALSIR_DATA[11:8] 0x00
0x0E TEST1 (Write as 0x00) 0x00
0x0F TEST2 (Write as 0x00) 0x00
TABLE 2. REGISTER 0x00 (RESERVED)
BIT # ACCESS DEFAULT NAME FUNCTION/OPERATION
7:0 (n/a) (n/a) (n/a) Reserved - no need to read or write
TABLE 3. REGISTER 0x01 (CONFIGURE) - PROX/ALS CONFIGURATION
BIT # ACCESS DEFAULT NAME FUNCTION/OPERATION
7RW 0x00 PROX_EN
(Prox Enable)
When = 0, proximity sensing is disabled
When = 1, continuous proximity sensing is enabled. Prox data will be ready 0.54ms after this bit is
set high
6:4 RW 0x00 PROX_SLP
(Prox Sleep)
For bits 6:4 = (see the following)
111; sleep time between prox IR LED pulses is 0.0ms (run continuously)
110; sleep time between prox IR LED pulses is 12.5ms
101; sleep time between prox IR LED pulses is 50ms
100; sleep time between prox IR LED pulses is 75ms
011; sleep time between prox IR LED pulses is 100ms
010; sleep time between prox IR LED pulses is 200ms
001; sleep time between prox IR LED pulses is 400ms
000; sleep time between prox IR LED pulses is 800ms
3RW 0x00 PROX_DR
(Prox Drive)
When = 0, IRDR behaves as a pulsed 110mA current sink
When = 1, IRDR behaves as a pulsed 220mA current sink
2RW 0x00 ALS_EN
(ALS Enable)
When = 0, ALS/IR sensing is disabled
When = 1, continuous ALS/IR sensing is enabled with new data ready every 100ms
1RW 0x00ALS_RANGE
(ALS Range)
When = 0, ALS is in low-lux range
When = 1, ALS is in high-lux range
0RW 0x00ALSIR_MODE
(ALSIR Mode)
When = 0, ALS/IR data register contains visible ALS sensing data
When = 1, ALS/IR data register contains IR spectrum sensing data
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

ISL29030AIROZ-EVALZ

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Description:
Optical Sensor Development Tools ISL29030AIROZ-EVALZ EVAL BRD RHS COMPLI
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