74ABT244CSJX

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74ABT244
Skew
Note 12: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH-to-LOW (t
OSHL
), LOW-to-HIGH (t
OSLH
), or any combination switching LOW-to-HIGH and/or
HIGH-to-LOW (t
OST
). The specification is guaranteed but not tested.
Note 13: Propagation delay variation for a given set of conditions (i.e., temperature and V
CC
) from device to device. This specification is guaranteed but not
tested.
Note 14: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.)
Note 15: These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load.
Note 16: This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same pin. It is measured across all
the outputs (drivers) on the same chip, the worst (largest delta) number is the guaranteed specification. This specification is guaranteed but not tested.
Capacitance
Note 17: C
OUT
is measured at frequency f = 1 MHz, per MIL-STD-883, Method 3012.
T
A
= 40°C to +85°CT
A
= 40°C to +85°C
V
CC
= 4.5V5.5V V
CC
= 4.5V5.5V
Symbol Parameter
C
L
= 50 pF C
L
= 250 pF
Units
8 Outputs Switching 8 Outputs Switching
(Note 14) (Note 15)
Max Max
t
OSHL
Pin to Pin Skew
0.8 1.8 ns
(Note 12) HL Transitions
t
OSLH
Pin to Pin Skew
0.8 1.8 ns
(Note 12) LH Transitions
t
PS
Duty Cycle
1.0 2.5 ns
(Note 16) LHHL Skew
t
OST
Pin to Pin Skew
1.0 2.5 ns
(Note 12) LH/HL Transitions
t
PV
Device to Device Skew
1.5 3.0 ns
(Note 13) LH/HL Transitions
Symbol Parameter Typ Units
Conditions
T
A
= 25°C
C
IN
Input Capacitance 5.0 pF V
CC
= 0V
C
OUT
(Note 17) Output Capacitance 9.0 pF V
CC
= 5.0V
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74ABT244
AC Loading
*Includes jig and probe capacitance
FIGURE 1. Standard AC Test Load
AC Waveforms
FIGURE 2. Test Input Signal Levels
FIGURE 3. Test Input Signal Requirements
FIGURE 4. Propagation Delay,
Pulse Width Waveforms
FIGURE 5. 3-STATE Output HIGH
and LOW Enable and Disable Times
FIGURE 6. Propagation Delay Waveforms for
Inverting and Non-Inverting Functions
FIGURE 7. Setup Time, Hold Time
and Recovery Time Waveforms
Amplitude Rep. Rate t
W
t
r
t
f
3.0V 1 MHz 500 ns 2.5 ns 2.5 ns
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74ABT244
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Body
Package Number M20B

74ABT244CSJX

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC BUFFER NON-INVERT 5.5V 20SOP
Lifecycle:
New from this manufacturer.
Delivery:
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