C8051F04x-DK
Rev. 0.6 7
6. Target Board
The
C8051F04x
Development Kit includes a target board with a
C8051F040
device pre-installed for evaluation and
preliminary software development. Numerous input/output (I/O) connections are provided to facilitate prototyping
using the target board. Refer to
Figure 3
for the locations of the various I/O connectors.
P1 Power connector (accepts input from 7 to 15 VDC unregulated power adapter)
J1 Connects SW2 to P3.7 pin
J3 Connects LED D3 to P1.6 pin
J4 JTAG connector for Debug Adapter interface
J5 DB-9 connector for UART0 RS232 interface
J6 Connector for UART0 TX (P0.0)
J8 Connector for UART0 RTS (P4.0)
J9 Connector for UART0 RX (P0.1)
J10 Connector for UART0 CTS (P4.1)
J11 Analog loopback connector
J12-J19 Port 0 - 7 connectors
J20 Analog I/O terminal block
J22 VREF connector
J23 VDD Monitor Disable
J24 96-pin Expansion I/O connector
J25 DB-9 connector for CAN interface
Figure 3. C8051F040 Target Board
J24
Port 1
Port 2
Port 3
Port 0
Port 7
Port 6
Port 5
Port 4
Pin 1
J20
JTAG
Pin 1
J25 J5
J1
CAN RS232
RESET
P3.7
J9
J6
J10
J8
J3
J23J7
C8051
F04X
J2
J21
J22
Pin 1
Pin 2
J11
Pin 1
Pin 2
P1.6
Pin 1
PWR
P1
J4
C8051F04x-DK
8 Rev. 0.6
6.1. System Clock Sources
The
C8051F040
device installed on the target board features a calibrated programmable internal oscillator which is
enabled as the system clock source on reset. After reset, the internal oscillator operates at a frequency of
3.0625 MHz (±2%) by default but may be configured by software to operate at other frequencies. Therefore, in many
applications an external oscillator is not required. However, an external 22.1184 MHz crystal is installed on the target
board for additional applications. Refer to the
C8051F04x
data sheet for more information on configuring the system
clock source.
6.2. Switches and LEDs
Two switches are provided on the target board. Switch SW1 is connected to the RESET pin of the C8051F040.
Pressing SW1 puts the device into its hardware-reset state. Switch SW2 is connected to the C8051F040’s general
purpose I/O (GPIO) pin through headers. Pressing SW2 generates a logic low signal on the port pin. Remove the
shorting block from the header to disconnect SW2 from the port pins. The port pin signal is also routed to a pin on
the J24 I/O connector. See Table 1 for the port pins and headers corresponding to each switch.
Two LEDs are also provided on the target board. The red LED labeled PWR is used to indicate a power connection
to the target board. The green LED labeled with a port pin name is connected to the C8051F040’s GPIO pin
through headers. Remove the shorting block from the header to disconnect the LED from the port pin. The port pin
signal is also routed to a pin on the J24 I/O connector. See Table 1 for the port pins and headers corresponding to
each LED.
6.3. Target Board JTAG Interface (J4)
The
JTAG
connector (J4) provides access to the
JTAG
pins of the C8051F040. It is used to connect the Serial
Adapter or the USB Debug Adapter to the target board for in-circuit debugging and Flash programming. Table 2
shows the
JTAG
pin definitions.
Table 1. Target Board I/O Descriptions
Description I/O Header
SW1 Reset none
SW2 P3.7 J1
Green LED P1.6 J3
Red LED PWR none
Table 2. JTAG Connector Pin Descriptions
Pin # Description
1 +3VD (+3.3VDC)
2, 3, 9 GND (Ground)
4TCK
5TMS
6TDO
7TDI
8, 10 Not Connected
C8051F04x-DK
Rev. 0.6 9
6.4. Serial Interface (J5)
A RS232 transceiver circuit and DB-9 (J5) connector are provided on the target board to facilitate serial connec-
tions to UART0 of the C8051F040. The TX, RX, RTS and CTS signals of UART0 may be connected to the DB-9
connector and transceiver by installing shorting blocks on headers J6, J8, J9 and J10.
J6 - Install shorting block to connect UART0 TX (P0.0) to transceiver.
J9 - Install shorting block to connect UART0 RX (P0.1) to transceiver.
J8 - Install shorting block to connect UART0 RTS (P4.0) to transceiver.
J10 - Install shorting block to connect UART0 CTS (P4.1) to transceiver.
6.5. Analog I/O (J11, J20)
Several C8051F040 analog signals are routed to the J20 terminal block and the J11 header. The J11 connector
provides the ability to connect DAC0 and DAC1 outputs to several different analog inputs by installing a shorting
block between a DAC output and an analog input on adjacent pins of J11. Refer to Table 3 for J20 terminal block
connections and Table 4 for J11 pin definitions.
Table 3. J20 Terminal Block Pin Descriptions
Pin # Description
1HVAIN+
2HVAIN-
3 HVREF
4DAC1
5AIN0.0
6AIN0.1
7VREF0
8 ADND (Analog Ground)
Table 4. J11 Connector Pin Descriptions
Pin # Description
1AIN0.0
2AIN0.1
3DAC0
4DAC1
5AIN0.2
6AIN0.3

C8051F040DK-E

Mfr. #:
Manufacturer:
Silicon Labs
Description:
C8051F04X EVAL BRD
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union