ACPL-4800-300E

7
Electrical Specication
-40°C T
A
100°C, 4.5V V
CC
20V, 6mA I
F(ON)
10 mA, 0V V
F(OFF)
0.8 V, unless otherwise specied.
All Typicals at T
A
= 25°C.
Parameter Sym. Min. Typ. Max. Units Test Conditions Fig. Note
Logic Low
Output Voltage
V
OL
0.5 V I
OL
= 6.4 mA 1, 3
Logic High
Output Voltage
V
OH
2.4 V
CC
- 1.1V V I
OH
= -2.6 mA 2, 3,
7
2.7 I
OH
= -0.4 mA
Output Leakage
Current(V
OUT
=
V
CC
+0.5V)
I
OHH
100 µA Vcc = 5 V I
F
= 10mA
500 Vcc = 20 V
Logic Low
Supply Current
I
CCL
1.9 3.0 mA Vcc = 5.5 V V
F
= 0 V
I
O
= Open
2.0 3.0 Vcc = 20 V
Logic High
Supply Current
I
CCH
1.5 2.5 mA Vcc = 5.5 V I
F
= 10 mA
I
O
= Open
1.6 2.5 Vcc = 20 V
Logic Low Short Circuit
Output Current
I
OSL
25 mA V
O
= Vcc = 5.5 V V
F
=0V 2
50 V
O
= Vcc = 20 V
Logic High Short
Circuit Output Current
I
OSH
-25 mA V
CC
= 5.5 V I
F
=6mA
V
O
=GND
2
-50 V
CC
= 20 V
Input Forward Voltage V
F
1.5 1.7 V T
A
= 25 C I
F
=6mA 4
1.85
Input Reverse
Breakdown Voltage
BV
R
5 V I
R
= 10 µA
Input Diode
Temperature Coecient
DV
F
DT
A
-1.7 mV/
°C
I
F
= 6 mA
Input Capacitance C
IN
60 pF f = 1 MHz, V
F
= 0 V 3
8
Switching Specications (AC)
-40°C T
A
100°C, 4.5V V
CC
20V, 6mA I
F(ON)
10 mA, 0V V
F(OFF)
0.8V.
All Typicals at T
A
= 25°C, I
F(ON)
= 6 mA unless otherwise specied.
Parameter Sym. Min. Typ. Max. Units Test Conditions Fig. Note
Propagation Delay Time
to Logic Low Output
Leve
t
PHL
150 350 ns With Peaking Capacitor 5,6 5
Propagation Delay Time
to Logic High Output
Level
t
PLH
110 350 ns With Peaking Capacitor 5,6 5
Pulse Width Distortion PWD 250 ns | t
PHL
- t
PLH
| 8
Propagation Delay Dif-
ference Between Any 2
Parts
PDD -100 250 ns 10
Output Rise Time (10-
90%)
t
r
16 ns 5,8
Output Fall Time (90-
10%)
t
f
20 ns 5,8
Logic High Common
Mode Transient Immu-
nity
|CM
H
| -30000 V/µs |V
CM
| = 1000 V, I
F
= 6.0 mA,
V
CC
= 5 V, T
A
= 25 C
9 6
Logic Low Common
Mode Transient Immu-
nity
|CM
L
| 30000 V/µs |V
CM
| = 1000 V, V
F
= 0 V, V
CC
= 5 V, T
A
= 25 C
9 6
Package Characteristics
* The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage
rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table (if applicable), your equipment level
safety specication or Avago Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage, publication number 5963-2203E.
Notes:
1. Derate total package power dissipation, P
T
, linearly above 70°C free-air temperature at a rate of 4.5 mW/°C.
2. Duration of output short circuit time should not exceed 10 ms.
3. Input capacitance is measured between pin 2 and pin 3.
4. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together and pins 5, 6, 7, and 8 shorted together.
5. The t
PLH
propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.3 V point on the leading edge of the
output pulse. The t
PHL
propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.3 V point on the trailing
edge of the output pulse.
6. C
MH
is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic high state, V
O
> 2.0 V. C
ML
is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic low state, V
O
< 0.8 V.
7. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 4500 V rms for one second (leakage detec-
tion current limit, II-O 5 µA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN
60747-5-2 Insulation Characteristics Table, if applicable.
8. Pulse Width Distortion (PWD) is dened as |t
PHL
- t
PLH
| for any given device.
9. Use of a 0.1 µF bypass capacitor connected between pins 5 and 8 is recommended.
10. The dierence between t
PLH
and t
PHL
between any two devices under the same test condition.
Parameter Sym. Min. Typ. Max. Units Test Conditions Fig. Note
Input-Output Momentary
Withstand Voltage*
V
ISO
3750 V
rms
RH < 50%, t = 1 min.T
A
= 25°C
4,7
Input-Output Resistance R
I-O
10
12
W V
I-O
= 500 Vdc 4
Input-Output Capacitance C
I-O
0.6 pF f = 1 MHz, V
I-O
= 0 Vdc 4
9
Figure 5. Test Circuit for tPLH,tPHL,tr,tf
7
1
4
5
6
8
5 V
619
INPUT
MONITORING
NODE
PULSE GEN.
t
r
= t
f
=
5 ns
f = 100 kHz
10 % DUTY
CYCLE
V
O
= 5 V
Z
O
= 50
C
2
=
15 pF
OUTPUT V
O
MONITORING
NODE
V
CC
R
1
D
1
D
2
5 k
D
3
D
4
2
3
C
1
=
120 pF
* 0.1 µF BYPASS
*
Figure 1. Typical Logic Low Output Voltage vs. Temputer Figure 2. Typical Logic High Output Current vs. Temputer
Figure 3. Typical Output Voltage vs. Forward Input Current Figure 4. Typical Input Diode Forward Characteristic
0.1
0.11
0.12
0.13
0.14
0.15
-50 0 50 100 150
V
OL
- LOW LEVEL OUTPUT VOLTAGE - V
T
A
- TEMPERATURE - ˚C
V
CC
= 4.5/20V
V
F
= 0V
I
O
= 6.4mA
V
CC
= 4.5V
V
CC
= 20V
-25
-20
-15
-10
-5
0
-50 0 50 100 150
T
A
- TEMPERATURE - ˚C
I
OH
- HIGH LEVEL OUTPUT CURRENT - mA
V
CC
= 4.5V
I
F
= 6mA
V
O
= 2.4V
V
O
= 2.7V
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
0 1 2 3 4 5
I
F
- INPUT CURRENT - mA
Vo - OUTPUT VOLTAGE - V
I
O
= -2.6mA
T
A
= 25C
V
CC
= 4.5V
I
O
= 6.4mA
I
F
- FORWARD CURRENT - mA
1.1
0.001
V
F
- FORWARD VOLTAGE - V
1.0
1000
1.3
0.01
1.51.2 1.4
0.1
T
A
= 25 ˚C
10
100
I
F
+
-
V
F
THE PROBE AND JIG CAPACITANCES
ARE INCLUDED IN C1 AND C2.
R
1
I
F
(ON)
1.10 k
3 mA
681
5 mA
ALL DIODES ARE 1N916 OR 1N3064.
I
F
(ON)
50 % I
F
(ON)
0 mA
t
PLH
t
PHL
V
OH
1.3 V
V
OL
INPUT I
F
OUTPUT V
O
330
10 mA

ACPL-4800-300E

Mfr. #:
Manufacturer:
Broadcom / Avago
Description:
Logic Output Optocouplers 4.5-20Vcc 250ns PWD
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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