SC18IS600 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 7.1 — 20 November 2017 13 of 30
NXP Semiconductors
SC18IS600
SPI to I
2
C-bus interface
6.5.2 Read N bytes from I
2
C-bus slave device
Once the host issues this command, the SC18IS600 will start an I
2
C-bus read transaction
on the I
2
C-bus to the specified slave address. Once the data is received, the SC18IS600
will place this data in the receiver buffer, and will generate an interrupt on the INT
pin. The
‘transaction completed’ status can be read in the I2CStat. Note that the data is not
returned until a Read Buffer command is performed (see Section 6.5.4 “
Read buffer).
Note that the third byte sent by the host is the device slave address. The SC18IS600 will
ignore the least significant bit so a read will always be performed even if the least
significant bit is a ‘0’. The maximum number of bytes to be read is 96.
6.5.3 I
2
C-bus read after write
Once the host issues this command, the SC18IS600 will start a write transaction on the
I
2
C-bus to the specified slave address. Once the data is written, the SC18IS600 will read
data from the specified slave, place the data in the Receiver Buffer and generate an
interrupt on the INT
pin. The ‘transaction completed’ status can be read in I2CStat. Note
that the data is not returned until a ‘Read Buffer’ command is performed.
6.5.4 Read buffer
Fig 12. Read N bytes from I
2
C-bus slave device
NUMBER
OF BYTES
0x01
COMMAND
SLAVE ADDRESS
+ R
SPI host sends
CS
SCLK
MOSI
1slave address A[7:1]number of bytes D[7:0]command 0x01
002aab719
Fig 13. I
2
C-bus read after write
002aab720
NUMBER OF
WRITE
BYTES
0x02
COMMAND
SLAVE
ADDRESS
+ W
SPI host sends
DATA
WRITE
BYTE 0
DATA
WRITE
BYTE N
NUMBER OF
READ
BYTES
SLAVE
ADDRESS
+ R
Fig 14. Read buffer
002aab868
0x06
COMMAND
SPI host sends
DATA
BYTE 1
DATA
BYTE N
SC18IS600 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 7.1 — 20 November 2017 14 of 30
NXP Semiconductors
SC18IS600
SPI to I
2
C-bus interface
When the host issues a Read Buffer command, the SC18IS600 will return the data in the
Read Buffer on the MISO pin. Note that the Read Buffer will be overwritten if an additional
‘Read N bytes’ or a ‘Read after write’ command is executed before the Read Buffer
command.
6.5.5 I
2
C-bus write after write
When the host issues this command, the SC18IS600 will first write N data bytes to the
I
2
C-bus slave 1 device followed by a write of M data bytes to the I
2
C-bus slave 2 device.
6.5.6 SPI configuration
The SPI configuration command can be used to change the order in which the bits of SPI
data byte are sent on the SPI bus. In the LSB first configuration (SPI configuration data is
0x81), bit 0 is the first bit sent of any SPI byte. In MSB first (SPI configuration data is
0x42), bit 7 is the first bit sent. Table 10
shows the two possible configurations that can be
programmed.
Fig 15. Write after write
002aab721
NUMBER OF
BYTES 1
0x03
COMMAND
SLAVE 1
ADDRESS + W
SPI host sends
DATA
BYTE 1
DATA
BYTE N
NUMBER OF
BYTES 2
SLAVE 2
ADDRESS + W
DATA
BYTE 1
DATA
BYTE M
Fig 16. SPI configuration
Table 10. SPI configuration
SPI configuration Data order
0x81 LSB first
0x42 MSB first (default)
002aab722
0x18
COMMAND
SPI
CONFIGURATION
SPI host sends
CS
SCLK
MOSI
SPI configuration datacharacter 0x18
SC18IS600 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 7.1 — 20 November 2017 15 of 30
NXP Semiconductors
SC18IS600
SPI to I
2
C-bus interface
6.5.7 Write to SC18IS600 internal registers
A Write Register function is initiated by sending a 0x20 command followed by an internal
register address to be written (see Section 6.1
). The register data byte follows the register
address. Only one register can be accessed in a single transaction. There is no
auto-incrementing of the register address.
6.5.8 Read from SC18IS600 internal register
A Read Register function is initiated by sending a 0x21 command followed by an internal
register address to be read (see Section 6.1
) and a dummy byte. The data byte of the
read register is returned by the SC18IS600 on the MISO pin. Only one register can be
accessed in a single transaction. There is no auto-incrementing of the register address.
Note that write and read from internal registers are processed immediately as soon as the
SC18IS600 determines the intended register.
Fig 17. Write to SC18IS600 internal registers
002aab723
REGISTER
X
0x20
COMMAND
SPI host sends
DATA
BYTE
CS
SCLK
MOSI
data byteregister Xcharacter 0x20
Fig 18. Read from SC18IS600 internal register
0x21
COMMAND
REGISTER
DATA
SPI host sends
CS
SCLK
MOSI
dummy byteregister Xcharacter 0x21
002aab724
MISO
data byte
REGISTER
X

SC18IS601IPW,112

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC CONTROLLER SPI/I2C 16TSSOP
Lifecycle:
New from this manufacturer.
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