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PL130-05QC-R

P1-P3P4-P4
PL130-05
High Speed Translator Buffer to PECL (Enable Low)
Micrel Inc. • 2180 Fortu ne Drive • San Jose, CA 95131 • U SA • tel +1(408) 944-0800 • f ax +1(408) 474-1000 • www.micrel.com Rev 9/9/04 Pa ge 1
FEATURES
Differential PECL output
Single AC coupled input (min. 100mV swing).
Input range from DC to 1.0 GHz.
2.5V to 3.3V operation.
Available in 3x3mm QFN.
DESCRIPTION
The PL130-05 is a low cost, high performance,
high speed, buffer that reproduces any input fre-
quency from DC to 1.3GHz. It provides one pair
of differential PECL outputs. Any input signal
with at least 100mV swing can be used as refe r-
ence signal. This chip is ideal for co nversion
from sine wave, TTL, CMOS, or LVDS to PECL.
PIN CONFIGURATION
(TOP VIEW)
BLOCK DIAGRAM
Input
Amplifier
PECL_BAR
REF_IN
PECL
PL130-05
PECL_BAR
PECL
GND
VDD
1 2 3 4
12 11 10 9
13
14
15
16
8
7
6
5
VDD
VDD
GND
VDD
GND
GND
GND
OE
V
GND
GND
REF_IN
GND
Note:
V
denotes internal pull down
PL130-05
High Speed Translator Buffer to PECL (Enable Low)
Micrel Inc. • 2180 Fortu ne Drive • San Jose, CA 95131 • U SA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www. micrel.com Rev 9/9/04 Page 2
PIN DESCRIPTIONS
Name
3x3mm QFN
Pin number
Type
Description
GND
1,2,4,5,
9,13,14,15
P
Ground.
VDD
7,10,11,12
P
Power supply.
REF_IN
3
I
Reference input signal. The frequency of this signal will be reproduced
at the output (after translation to PECL level).
PECL
6
O
PECL True output.
PECL_BAR
8
O
PECL Complementary output.
OE
16
I
Output enable (‘0’ for enable).
Internal pull-down (default is ‘0’).
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
MIN.
MAX.
UNITS
Supply Voltage
4.6
V
Input Voltage, dc
-0.5
V
DD
+0.5
V
Output Voltage, dc
-0.5
V
DD
+0.5
V
Storage Temperature
-65
150
C
Ambient Operating Temperature*
-40
85
C
Junction Temperature
125
C
Lead Temperature (soldering, 10s)
260
C
ESD Protection, Human Body Model
2
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permane nt damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operati ons of the device at these or any other
conditions above the operational limits noted in this specification is n ot implied.
* Not e: Operating T emperature is guaranteed by design for all part s (COMMERCIAL and INDUSTRIAL), but tested f or COMMERCIAL grade only.
2. AC Specification
PARAMETERS
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Input Frequency
0
1000
MHz
Input signal swing
REF_IN input
100
mV
Output Frequency
0
1000
MHz
Output Rise Time
0.8V to 2.0V with no load
1.5
ns
Output Fall Time
2.0V to 0.8V with no load
1.5
ns
PL130-05
High Speed Translator Buffer to PECL (Enable Low)
Micrel Inc. • 2180 Fortu ne Drive • San Jose, CA 95131 • U SA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www. micrel.com Rev 9/9/04 Page 3
3. PECL Electrical Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
MAX.
UNITS
Output High Voltage
V
OH
R
L
= 50 to (V
DD
– 2V)
(see figure)
V
DD
– 1.025
V
Output Low Voltage
V
OL
V
DD
– 1.620
V
4. PECL Switching Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Clock Rise Time
t
r
@20/80% - PECL
0.6
1.5
ns
Clock Fall Time
t
f
@80/20% - PECL
0.5
1.5
ns
OUT
OUT
50
50
PECL Levels Test Circuit
PECL Transistion Time Waveform
OUT
OUT
50%
20%
80%
t
R
t
F
VDD
DUTY CYCLE
45 - 55% 55 - 45%
50%
OUT
OUT
t
SKEW
PECL Output Skew
2.0V
P1-P3P4-P4

PL130-05QC-R

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Description:
Clock Buffer High Speed Translator Buffer
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New from this manufacturer.
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