EL5171, EL5371
11
FN7307.9
August 14, 2015
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FIGURE 26.
Choice of Feedback Resistor and Gain
Bandwidth Product
For applications that require a gain of +1, no feedback resistor
is required. Just short the OUT+ pin to the FBP pin and the OUT-
pin to the FBN pin. For gains greater than +1, the feedback
resistor forms a pole with the parasitic capacitance at the
inverting input. As this pole becomes smaller, the amplifier's
phase margin is reduced. This causes ringing in the time
domain and peaking in the frequency domain. Therefore, R
F
has
some maximum value that should not be exceeded for optimum
performance. If a large value of R
F
must be used, a small
capacitor in the few Pico farad range in parallel with R
F
can help
to reduce the ringing and peaking at the expense of reducing
the bandwidth.
The bandwidth of the EL5171 and EL5371 depends on the load
and the feedback network. R
F
and R
G
appear in parallel with
the load for gains other than +1. As this combination gets
smaller, the bandwidth falls off. Consequently, R
F
also has a
minimum value that should not be exceeded for optimum
bandwidth performance. For gain of +1, R
F
= 0 is optimum. For
the gains other than +1, optimum response is obtained with R
F
between 500 to 1k.
The EL5171 and EL5371 have a gain bandwidth product of
100MHz for R
LD
= 1k. For gains 5, their bandwidth can be
predicted by Equation 3:
Driving Capacitive Loads and Cables
The EL5171 and EL5371 can drive 50pF differential capacitor
in parallel with 1k differential load with less than 5dB of
peaking at gain of +1. If less peaking is desired in applications,
a small series resistor (usually between 5 to 50) can be
placed in series with each output to eliminate most peaking.
However, this will reduce the gain slightly. If the gain setting is
greater than 1, the gain resistor R
G
can then be chosen to
make up for any gain loss, which may be created by the
additional series resistor at the output.
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, a back-termination series resistor at the
amplifier's output will isolate the amplifier from the cable and
allow extensive capacitive drive. However, other applications
may have high capacitive loads without a back-termination
resistor. Again, a small series resistor at the output can help to
reduce peaking.
Disable/Power-Down (for EL5371 only)
The EL5371 can be disabled and its outputs placed in a high
impedance state. The turn-off time is about 0.95µs and the
turn-on time is about 215ns. When disabled, the amplifier's
supply current is reduced to 1.7µA for I
S
+ and 120µA for I
S
-
typically, thereby effectively eliminating the power
consumption. The amplifier's power-down can be controlled by
standard CMOS signal levels at the ENABLE pin. The applied
logic signal is relative to the V
S
+ pin. Letting the EN pin float or
applying a signal that is less than 1.5V below V
S
+ will enable
the amplifier. The amplifier will be disabled when the signal at
the EN
pin is above V
S
+ - 0.5V.
Output Drive Capability
The EL5171 and EL5371 have internal short circuit protection.
Its typical short circuit current is ±90mA for EL5171 and ±70mA
for EL5371. If the output is shorted indefinitely, the power
dissipation could easily increase such that the part will be
destroyed. Maximum reliability is maintained if the output
current never exceeds ±60mA. This limit is set by the design of
the internal metal interconnections.
Power Dissipation
With the high output drive capability of the EL5171 and EL5371,
it is possible to exceed the +135°C absolute maximum junction
temperature under certain load current conditions. Therefore, it
is important to calculate the maximum junction temperature for
the application to determine if the load conditions or package
types need to be modified for the amplifier to remain in the safe
operating area.
The maximum power dissipation allowed in a package is
determined according to Equation 4:
Where:
•T
JMAX
= Maximum junction temperature
•T
AMAX
= Maximum ambient temperature
•
JA
= Thermal resistance of the package
The maximum power dissipation actually produced by an IC is
the total quiescent supply current times the total power supply
voltage, plus the power in the IC due to the load, or as
represented in Equation 5:
Where:
V
STOT
= Total supply voltage = V
S
+ - V
S
-
I
SMAX
= Maximum quiescent supply current per channel
V
O
= Maximum differential output voltage of the
application
R
LD
= Differential load resistance
V
O
+
FBP
R
G
R
F2
IN+
IN-
REF
FBN
V
IN
+
V
IN
-
V
REF
R
F1
V
O
-
PD
MAX
T
JMAX
T
AMAX
–
JA
---------------------------------------------
=
(EQ. 4)
(EQ. 5)
PD i V
STOT
I
SMAX
V
STOT
V
O
–
V
O
R
LD
------------
+
=
