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LT1226CS8#PBF

P1-P3P4-P6P7-P8
1
LT1226
■
Gain of 25 Stable
■
1GHz Gain Bandwidth
■
400V/µs Slew Rate
■
2.6nV/√Hz Input Noise Voltage
■
50V/mV Minimum DC Gain, R
L
= 500Ω
■
1mV Maximum Input Offset Voltage
■
±12V Minimum Output Swing into 500Ω
■
Wide Supply Range ±2.5V to ±15V
■
7mA Supply Current
■
100ns Settling Time to 0.1%, 10V Step
■
Drives All Capacitive Loads
D
U
ESCRIPTIO
S
F
EA
T
U
RE
The LT1226 is a low noise, very high speed operational
amplifier with excellent DC performance. The LT1226
features low input offset voltage and high DC gain. The
circuit is a single gain stage with outstanding settling
characteristics. The fast settling time makes the circuit an
ideal choice for data acquisition systems. The output is
capable of driving a 500Ω load to ±12V with ±15V supplies
and a 150Ω load to ±3V on ±5V supplies. The circuit is also
capable of driving large capacitive loads which makes it
useful in buffer or cable driver applications.
The LT1226 is a member of a family of fast, high per-
formance amplifiers that employ Linear Technology
Corporation’s advanced bipolar complementary
processing.
U
S
A
O
PP
L
IC
AT
I
■
Wideband Amplifiers
■
Buffers
■
Active Filters
■
Video and RF Amplification
■
Cable Drivers
■
Data Acquisition Systems
U
A
O
PP
L
IC
AT
ITY
P
I
CA
L
Photodiode Preamplifier, A
V
= 5.1kΩ, BW = 15MHz Gain of +25 Pulse Response
Low Noise Very High Speed
Operational Amplifier
5.1k
LT1226 TA01
–
+
LT1226
51Ω
51Ω
V
+
LT1226 TA02
LT1226
2
Total Supply Voltage (V
+
to V
–
) ............................... 36V
Differential Input Voltage ......................................... ±6V
Input Voltage ............................................................±V
S
Output Short Circuit Duration (Note 1) ............ Indefinite
Operating Temperature Range
LT1226C................................................ 0°C to 70°C
Maximum Junction Temperature
Plastic Package ..............................................150°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec.)................. 300°C
A
U
G
W
A
W
U
W
ARB
S
O
LU
T
EXI T
I
S
WU
U
PACKAGE
/
O
RDER I FOR ATIO
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OS
Input Offset Voltage (Note 2) 0.3 1.0 mV
I
OS
Input Offset Current 100 400 nA
I
B
Input Bias Current 48 µA
e
n
Input Noise Voltage f = 10kHz 2.6 nV/√Hz
i
n
Input Noise Current f = 10kHz 1.5 pA/√Hz
R
IN
Input Resistance V
CM
= ±12V 24 40 MΩ
Differential 15 kΩ
C
IN
Input Capacitance 2pF
Input Voltage Range + 12 14 V
Input Voltage Range – –13 –12 V
CMRR Common-Mode Rejection Ratio V
CM
= ±12V 94 103 dB
PSRR Power Supply Rejection Ratio V
S
= ±5V to ±15V 94 110 dB
A
VOL
Large Signal Voltage Gain V
OUT
= ±10V, R
L
= 500Ω 50 150 V/mV
V
OUT
Output Swing R
L
= 500Ω 12.0 13.3 ±V
I
OUT
Output Current V
OUT
= ±12V 24 40 mA
SR Slew Rate (Note 3) 250 400 V/µs
Full Power Bandwidth 10V Peak, (Note 4) 6.4 MHz
GBW Gain Bandwidth f = 1MHz 1 GHz
t
r
, t
f
Rise Time, Fall Time A
VCL
= +25,10% to 90%, 0.1V 5.5 ns
Overshoot A
VCL
= +25, 0.1V 35 %
Propagation Delay 50% V
IN
to 50% V
OUT
5.5 ns
t
s
Settling Time 10V Step, 0.1%, A
V
= –25 100 ns
Differential Gain f = 3.58MHz, A
V
= +25, R
L
= 150Ω 0.7 %
Differential Phase f = 3.58MHz, A
V
= +25, R
L
= 150Ω 0.6 Deg
R
O
Output Resistance A
VCL
= +25, f = 1MHz 3.1 Ω
I
S
Supply Current 79 mA
E
LECTR
IC
AL C CHARA TERIST
ICS
V
S
= ±15V, T
A
= 25°C, V
CM
= 0V unless otherwise noted.
1
2
3
4
5
6
7
8
TOP VIEW
NULL
V
+
NULL
–IN
OUT
NC
+IN
V
–
S8 PACKAGE
8-LEAD PLASTIC SOIC
N8 PACKAGE
8-LEAD PLASTIC DIP
LT1226 PO01
ORDER PART
NUMBER
S8 PART MARKING
1226
LT1226CN8
LT1226CS8
3
LT1226
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OS
Input Offset Voltage V
S
= ±15V, (Note 2) 0.3 1.3 mV
V
S
= ± 5V, (Note 2) 1.0 1.8 mV
Input V
OS
Drift 6 µV/°C
I
OS
Input Offset Current V
S
= ±15V and V
S
= ±5V 100 600 nA
I
B
Input Bias Current V
S
= ±15V and V
S
= ±5V 4 9 µA
CMRR Common-Mode Rejection Ratio V
S
= ±15V, V
CM
= ±12V and V
S
= ±5V, V
CM
= ±2.5V 92 103 dB
PSRR Power Supply Rejection Ratio V
S
= ±5V to ±15V 92 110 dB
A
VOL
Large Signal Voltage Gain V
S
= ±15V, V
OUT
= ±10V, R
L
= 500Ω 35 150 V/mV
V
S
= ±5V, V
OUT
= ±2.5V, R
L
= 500Ω 35 100 V/mV
V
OUT
Output Swing V
S
= ±15V, R
L
= 500Ω 12.0 13.3 ±V
V
S
= ±5V, R
L
= 500Ω or 150Ω 3.0 3.3 ±V
I
OUT
Output Current V
S
= ±15V, V
OUT
= ±12V 24 40 mA
V
S
= ±5V, V
OUT
= ±3V 20 40 mA
SR Slew Rate V
S
= ±15V, (Note 3) 250 400 V/µs
I
S
Supply Current V
S
= ±15V and V
S
= ±5V 7 10.5 mA
V
S
= ±5V, T
A
= 25°C, V
CM
= 0V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OS
Input Offset Voltage (Note 2) 1.0 1.4 mV
I
OS
Input Offset Current 100 400 nA
I
B
Input Bias Current 48 µA
Input Voltage Range + 2.5 4 V
Input Voltage Range – –3 –2.5 V
CMRR Common-Mode Rejection Ratio V
CM
= ±2.5V 94 103 dB
A
VOL
Large Signal Voltage Gain V
OUT
= ±2.5V, R
L
= 500Ω 50 100 V/mV
V
OUT
= ±2.5V, R
L
= 150Ω 75 V/mV
V
OUT
Output Voltage R
L
= 500Ω 3.0 3.7 ±V
R
L
= 150Ω 3.0 3.3 ±V
I
OUT
Output Current V
OUT
= ±3V 20 40 mA
SR Slew Rate (Note 3) 250 V/µs
Full Power Bandwidth 3V Peak, (Note 4) 13.3 MHz
GBW Gain Bandwidth f = 1MHz 700 MHz
t
r
, t
f
Rise Time, Fall Time A
VCL
= +25, 10% to 90%, 0.1V 8 ns
Overshoot A
VCL
= +25, 0.1V 25 %
Propagation Delay 50% V
IN
to 50% V
OUT
8ns
t
s
Settling Time – 2.5V to 2.5V, 0.1%, A
V
= –24 60 ns
I
S
Supply Current 79 mA
E
LECTR
IC
AL C CHARA TERIST
ICS
E
LECTR
IC
AL C CHARA TERIST
ICS
Note 3: Slew rate is measured between ±10V on an output swing of ±12V
on ±15V supplies, and ±2V on an output swing of ±3.5V on ±5V supplies.
Note 4: Full power bandwidth is calculated from the slew rate
measurement: FPBW = SR/2πVp.
Note 1: A heat sink may be required to keep the junction temperature
below absolute maximum when the output is shorted indefinitely.
Note 2: Input offset voltage is tested with automated test equipment
in <1 second.
0°C ≤ T
A
≤ 70°C, V
CM
= 0V unless otherwise noted.
P1-P3P4-P6P7-P8

LT1226CS8#PBF

Mfr. #:
Buy LT1226CS8#PBF
Manufacturer:
Analog Devices Inc.
Description:
High Speed Operational Amplifiers L N Very Hi Speed Op Amp
Lifecycle:
New from this manufacturer.
Delivery:
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