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applications inForMation
Loop Stability
The servo loop is compensated by the parasitic capaci-
tance of the power N-channel MOSFET. No further
compe
nsation components are normally required. In
the case when a MOSFET with less than 1000pF gate
capacitance is chosen, a 1000pF compensation capacitor
connected across the gate and source pins might be
required.
Design Example
The following design example demonstrates the calculations
involved for selecting components in a 36V to 72V system
with 5A maximum load current (see Figure 2).
First, choose the N-channel MOSFET. The 100V, FDS3672
in the SO-8 package with R
DS(ON)
= 22mW(max) offers
a good solution. The maximum voltage drop across it is:
DV = 5A • 22mΩ = 110mV
The maximum power dissipation in the MOSFET is a mere:
P = 5A • 110mV = 0.55W
Next, select the resistive dividers that guarantee the
PWRFLT pins will not assert when the input supplies are
above 36V. The maximum V
MONx(TH)
is 1.245V and the
maximum I
MONx(IN)
is 1µA. Choose a 1% tolerance resistor
R1 = 12.7k. Then,
I
R2
=
V
MONx(TH)
R1(MIN)
+ I
MONx(TH)(MAX)
=
1.245V
12.7kΩ(−1%)
+ 1µA = 100µA
Use I
R2
to choose R2.
R2 =
36V − 1.245V
100µA
= 348kΩ
Adjust R2 down by 1% to 344k to account for its tolerance.
The next lower standard resistor value is R2 = 340k.
The LED D1, a Panasonic Green LN1351C, requires at least
1mA of current to fully turn on. Therefore, R5 is set to 33k
to accommodate the lowest input supply voltage of 36V.
4355 F02
LTC4355
GND
GATE1 GATE2IN1 OUTIN2
MON1
MON2
SET
R1
12.7k
R2
340k
R3
12.7k
R4
340k
R5
33k
R7
33k
R9
33k
R6
33k
R8
33k
D1 D3
D2 D4
D5
GND
M1
FDS3672
M2
FDS3672
TO
LOAD
V
IN1
= +48V
V
IN2
= +48V
VDSFLT
FUSEFLT1
FUSEFLT2
PWRFLT1
PWRFLT2
F1
7A
F2
7A
GREEN LEDs
PANASONIC LN1351C
Figure 2. 36V to 72V/5A Design Example
