74LVTH16244MTD

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74LVT16244 74LVTH16244
DC Electrical Characteristics (Continued)
Note 5: Applies to bushold versions only (LVTH16244).
Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 8: This is the increase in supply current for each input that is at the specified voltage level rather than V
CC
or GND.
Dynamic Switching Characteristics (Note 9)
Note 9: Characterized in SSOP package. Guaranteed parameter, but not tested.
Note 10: Max number of outputs defined as (n). n
1 data inputs are driven 0V to 3V. Output under test held LOW.
AC Electrical Characteristics
Note 11: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Capacitance (Note 12)
Note 12: Capacitance is measured at frequency f 1 MHz, per MIL-STD-883, Method 3012.
Symbol Parameter
V
CC
T
A
40 C to 85 C
Units Conditions
(V) Min Max
I
CCH
Power Supply Current 3.6 0.19 mA Outputs High
I
CCL
Power Supply Current 3.6 5.0 mA Outputs Low
I
CCZ
Power Supply Current 3.6 0.19 mA Outputs Disabled
I
CCZ
Power Supply Current 3.6 0.19 mA V
CC
V
O
5.5V,
Outputs Disabled
I
CC
Increase in Power Supply Current 3.6 0.2 mA One Input at V
CC
0.6V
(Note 8) Other Inputs at V
CC
or GND
Symbol Parameter
V
CC
T
A
25 C
Units
Conditions
(V) Min Typ Max
C
L
50 pF, R
L
500
V
OLP
Quiet Output Maximum Dynamic V
OL
3.3 0.8 V (Note 10)
V
OLV
Quiet Output Minimum Dynamic V
OL
3.3 0.8 V (Note 10)
Symbol Parameter
T
A
40 C to 85 C
Units
C
L
50 pF, R
L
500
V
CC
3.3V 0.3V V
CC
2.7V
Min Max Min Max
t
PLH
Propagation Delay Data to Output 1.2 3.5 1.2 3.9
ns
t
PHL
1.2 3.5 1.2 3.9
t
PZH
Output Enable Time 1.2 4.0 1.2 5.0
ns
t
PZL
1.2 5.0 1.2 6.5
t
PHZ
Output Disable Time 2.0 4.7 2.0 5.2
ns
t
PLZ
1.5 4.2 1.5 4.4
t
OSHL
Output to Output Skew
1.0 1.0 ns
t
OSLH
(Note 11)
Symbol Parameter Conditions Typical Units
C
IN
Input Capacitance V
CC
0V, V
I
0V or V
CC
4pF
C
OUT
Output Capacitance V
CC
3.0V, V
O
0V or V
CC
8pF
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74LVT16244 74LVTH16244
Physical Dimensions inches (millimeters) unless otherwise noted
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Package Number BGA54A
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74LVT16244 74LVTH16244
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
Package Number MS48A

74LVTH16244MTD

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
Buffers & Line Drivers 16-Bit Buf/Line Drv
Lifecycle:
New from this manufacturer.
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