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74LVTH16244MTDX

P1-P3P4-P6P7-P7
© 2005 Fairchild Semiconductor Corporation DS500151 www.fairchildsemi.com
March 1999
Revised June 2005
74LVT16244 • 74LVTH16244 Low Voltage16-Bit Buffer/Line Driver with 3-STATE Outputs
74LVT16244 • 74LVTH16244
Low Voltage16-Bit Buffer/Line Driver
with 3-STATE Outputs
General Description
The LVT16244 and LVTH16244 contain sixteen non-invert-
ing buffers with 3-STATE outputs designed to be employed
as a memory and address driver, clock driver, or bus ori-
ented transmitter/receiver. The device is nibble controlled.
Individual 3-STATE control inputs can be shorted together
for 8-bit or 16-bit operation.
The LVTH16244 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These buffers and line drivers are designed for low-voltage
(3.3V) V
CC
applications, but with the capability to provide a
TTL interface to a 5V environment. The LVT16244 and
LVTH16244 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining a low power dissipation
Features
■ Input and output interface capability to systems at
5V V
CC
■ Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH16244),
also available without bushold feature (74LVT16244).
■ Live insertion/extraction permitted
■ Power Up/Down high impedance provides glitch-free
bus loading
■ Outputs source/sink 32 mA/ 64 mA
■ Functionally compatible with the 74 series 16244
■ Latch-up performance exceeds 500 mA
■ ESD performance:
Human-body model
2000V
Machine model
200V
Charged-drive model
1000V
■ Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Ordering Code:
Note 1: Ordering code “G” indicates Trays.
Note 2: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Order Number
Package
Number
Package Description
74LVT16244G
(Note 1)(Note 2)
BGA54A
(Preliminary)
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LVT16244MEA
(Note 2)
MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LVT16244MTD
(Note 2)
MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
74LVTH16244G
(Note 1)(Note 2)
BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LVTH16244MEA
(Note 2)
MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LVTH16244MTD
(Note 2)
MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
www.fairchildsemi.com 2
74LVT16244 • 74LVTH16244
Connection Diagrams
Pin Assignment for SSOP and TSSOP
Pin Assignment for FBGA
(Top Thru View)
Logic Diagram
Pin Descriptions
FBGA Pin Assignments
Truth Table
H High Voltage Level
L
Low Voltage Level
X
Immaterial
Z
High Impedance
Functional Description
The LVT16244 and LVTH16244 contain sixteen non-invert-
ing buffers with 3-STATE outputs. The device is nibble
(4-bits) controlled with each nibble functioning identically,
but independent of the other. The control pins can be
shorted together to obtain full 16-bit operation.
Pin Names Description
OE
n
Output Enable Inputs (Active LOW)
I
0
–I
15
Inputs
O
0
–O
15
Outputs
NC No Connect
123456
A O
0
NC OE
1
OE
2
NC I
0
B O
2
O
1
NC NC I
1
I
2
C O
4
O
3
V
CC
V
CC
I
3
I
4
D O
6
O
5
GND GND I
5
I
6
E O
8
O
7
GND GND I
7
I
8
F O
10
O
9
GND GND I
9
I
10
G O
12
O
11
V
CC
V
CC
I
11
I
12
H O
14
O
13
NC NC I
13
I
14
J O
15
NC OE
4
OE
3
NC I
15
Inputs Outputs
OE
1
I
0
–I
3
O
0
–O
3
LL L
LH H
HX Z
Inputs Outputs
OE
2
I
4
–I
7
O
4
–O
7
LL L
LH H
HX Z
Inputs Outputs
OE
3
I
8
–I
11
O
8
–O
11
LL L
LH H
HX Z
Inputs Outputs
OE
4
I
12
–I
15
O
12
–O
15
LL L
LH H
HX Z
3 www.fairchildsemi.com
74LVT16244 • 74LVTH16244
Absolute Maximum Ratings(Note 3)
Recommended Operating Conditions
Note 3: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 4: I
O
Absolute Maximum Rating must be observed.
DC Electrical Characteristics
Symbol Parameter Value Conditions Units
V
CC
Supply Voltage 0.5 to 4.6 V
V
I
DC Input Voltage 0.5 to 7.0 V
V
O
Output Voltage 0.5 to 7.0 Output in 3-STATE
V
0.5 to 7.0 Output in HIGH or LOW State (Note 4)
I
IK
DC Input Diode Current 50 V
I
GND mA
I
OK
DC Output Diode Current 50 V
O
GND mA
I
O
DC Output Current 64 V
O
V
CC
Output at HIGH State
mA
128 V
O
V
CC
Output at LOW State
I
CC
DC Supply Current per Supply Pin 64 mA
I
GND
DC Ground Current per Ground Pin 128 mA
T
STG
Storage Temperature 65 to 150 C
Symbol Parameter Min Max Units
V
CC
Supply Voltage 2.7 3.6 V
V
I
Input Voltage 0 5.5 V
I
OH
HIGH Level Output Current 32 mA
I
OL
LOW Level Output Current 64 mA
T
A
Free Air Operating Temperature 40 85 C
t/ V Input Edge Rate, V
IN
0.8V–2.0V, V
CC
3.0V 0 10 ns/V
Symbol Parameter
V
CC
T
A
40 C to 85 C
Units Conditions
(V) Min Max
V
IK
Input Clamp Diode Voltage 2.7 1.2 V I
I
18 mA
V
IH
Input HIGH Voltage 2.7–3.6 2.0 V V
O
0.1V or
V
IL
Input LOW Voltage 2.7–3.6 0.8 V V
O
V
CC
0.1V
V
OH
Output HIGH Voltage 2.7–3.6 V
CC
0.2
V
I
OH
100 A
2.7 2.4 I
OH
8 mA
3.0 2.0 I
OH
32 mA
V
OL
Output LOW Voltage 2.7 0.2
V
I
OL
100 A
2.7 0.5 I
OL
24 mA
3.0 0.4 I
OL
16 mA
3.0 0.5 I
OL
32 mA
3.0 0.55 I
OL
64 mA
I
I(HOLD)
Bushold Input Minimum Drive
3.0
75
A
V
I
0.8V
(Note 5) 75 V
I
2.0V
I
I(OD)
Bushold Input Over-Drive
3.0
500
A
(Note 6)
(Note 5) Current to Change State 500 (Note 7)
I
I
Input Current 3.6 10
A
V
I
5.5V
Control Pins 3.6 1V
I
0V or V
CC
Data Pins 3.6
5V
I
0V
1V
I
V
CC
I
OFF
Power Off Leakage Current 0 100 A0V V
I
or V
O
5.5V
I
PU/PD
Power Up/Down
0 – 1.5V 100 A
V
O
0.5V to 3.0V
3-STATE Current V
I
GND or V
CC
I
OZL
3-STATE Output Leakage Current 3.6 5 AV
O
0.5V
I
OZH
3-STATE Output Leakage Current 3.6 5 AV
O
3.0V
I
OZH
3-STATE Output Leakage Current 3.6 10 AV
CC
V
O
5.5V
P1-P3P4-P6P7-P7

74LVTH16244MTDX

Mfr. #:
Buy 74LVTH16244MTDX
Manufacturer:
ON Semiconductor / Fairchild
Description:
Buffers & Line Drivers 16-Bit Buf/Line Drv
Lifecycle:
New from this manufacturer.
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