TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 6 — 24 August 2017 4 of 27
NXP Semiconductors
TJA1044
High-speed CAN transceiver with Standby mode
5. Block diagram
(1) V
IO
=V
CC
in non-V
IO
product variants.
Fig 1. Block diagram
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TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 6 — 24 August 2017 5 of 27
NXP Semiconductors
TJA1044
High-speed CAN transceiver with Standby mode
6. Pinning information
6.1 Pinning
6.2 Pin description
[1] HVSON8 package die supply ground is connected to both the GND pin and the exposed center pad. The
GND pin must be soldered to board ground. For enhanced thermal and electrical performance, it is
recommended that the exposed center pad also be soldered to board ground.
a. SO8 b. SO8 with V
IO
c. HVSON8 d. HVSON8 with V
IO
Fig 2. Pin configuration diagrams
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Table 3. Pin description
Symbol Pin Description
TXD 1 transmit data input
GND
[1]
2 ground supply
V
CC
3 supply voltage
RXD 4 receive data output; reads out data from the bus lines
n.c. 5 not connected; TJA1044T, TJA1044GT and TJA1044GTK only
V
IO
5 supply voltage for I/O level adapter; TJA1044x/3 variants only
CANL 6 LOW-level CAN bus line
CANH 7 HIGH-level CAN bus line
STB 8 Standby mode control input
TJA1044 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 6 — 24 August 2017 6 of 27
NXP Semiconductors
TJA1044
High-speed CAN transceiver with Standby mode
7. Functional description
7.1 Operating modes
The TJA1044 supports two operating modes, Normal and Standby. The operating mode is
selected via pin STB. See Table 4
for a description of the operating modes under normal
supply conditions.
[1] ‘x’ = don’t care.
7.1.1 Normal mode
A LOW level on pin STB selects Normal mode. In this mode, the transceiver can transmit
and receive data via the bus lines CANH and CANL (see Figure 1
for the block diagram).
The differential receiver converts the analog data on the bus lines into digital data which is
output on pin RXD. The slopes of the output signals on the bus lines are controlled
internally and are optimized in a way that guarantees the lowest possible EME.
7.1.2 Standby mode
A HIGH level on pin STB selects Standby mode. In Standby mode, the transceiver is not
able to transmit or correctly receive data via the bus lines. The transmitter and
Normal-mode receiver blocks are switched off to reduce supply current, and only a
low-power differential receiver monitors the bus lines for activity.
In Standby mode, the bus lines are biased to ground to minimize system supply current.
The low-power receiver is supplied from V
IO
(V
CC
in non-V
IO
variants) and can detect CAN
bus activity even if V
IO
is the only available supply voltage. Pin RXD follows the bus after
a wake-up request has been detected. A transition to Normal mode is triggered when STB
is forced LOW.
7.2 Remote wake-up (via the CAN bus)
The TJA1044 wakes up from Standby mode when a dedicated wake-up pattern (specified
in ISO 11898-2:2016) is detected on the bus. This filtering helps avoid spurious wake-up
events. A spurious wake-up sequence could be triggered by, for example, a dominant
clamped bus or by dominant phases due to noise or spikes on the bus.
The wake-up pattern consists of:
a dominant phase of at least t
wake(busdom)
followed by
a recessive phase of at least t
wake(busrec)
followed by
a dominant phase of at least t
wake(busdom)
Table 4. Operating modes
Mode Inputs Outputs
Pin STB Pin TXD CAN driver Pin RXD
Normal LOW LOW dominant LOW
HIGH recessive LOW when bus dominant
HIGH when bus recessive
Standby HIGH x
[1]
biased to ground follows BUS when wake-up
detected
HIGH when no wake-up detected

TJA1044GT/3Z

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
CAN Interface IC TJA1044GT/SO8//3/REEL 13 Q1 NDP SSB
Lifecycle:
New from this manufacturer.
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