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C8051F336DK

P1-P3P4-P6P7-P9P10-P12P13-P15
C8051F336/7/8/9
10 Rev. 0.3
5.5. Expansion I/O Connector (J1)
The 26-pin Expansion I/O connector J1 provides access to all signal pins of the C8051F338 device. Pins for +3 V,
digital ground and the output of an on-board low-pass filter are also available. A small through-hole prototyping
area is also provided. All I/O signals routed to connector J1 are also routed to through-hole connection points
between J1 and the prototyping area (see Figure 4 on page 6). Each connection point is labeled indicating the
signal available at the connection point. See Table 2 for a list of pin descriptions for J1.
5.6. Target Board DEBUG Interface (J4)
The
DEBUG
connector J4 provides access to the
DEBUG
(C2) pins of the C8051F338. It is used to connect the
Serial Adapter or the USB Debug Adapter to the target board for in-circuit debugging and Flash programming.
Table 3 shows the
DEBUG
pin definitions.
Table 2. J1 Pin Descriptions
Pin # Description Pin # Description
1 +3VD (+3.3VDC) 14 P1.3
2IDAC 15P1.4
3 P0.0 16 P1.5
4 P0.1 17 P1.6
5 P0.2 18 P1.7
6 P0.3 19 P2.0
7 P0.4 20 P2.1
8 P0.5 21 P2.2
9P0.6 22
P2.3
10 P0.7 23 P2.4
11 P1.0 24 /RST
12 P1.1 25 GND
13 P1.2 26 GND
Table 3. DEBUG Connector Pin Descriptions
Pin # Description
1 +3VD (+3.3VDC)
2, 3, 9 GND (Ground)
4 P2.4/C2D
5/RST (Reset)
6P2.4
7 /RST/C2CK
8 Not Connected
10 USB Power (+5VDC from J4)
C8051F336/7/8/9
Rev. 0.3 11
5.7. Serial Interface (J3)
A USB-to-UART bridge circuit (U3) and USB connector (P2) are provided on the target board to facilitate serial
connections to UART0 of the C8051F338. The Silicon Labs CP2102 (U3) USB-to-UART bridge provides data
connectivity between the C8051F338 and the PC via a USB port. The TX, RX, RTS and CTS signals of UART0
may be connected to the CP2102 by installing shorting blocks on header J3. The shorting block positions for
connecting each of these signals to the CP2102 are listed in Table 4. To use this interface, the USB-to-UART
device drivers should be installed as described in Section 4.4. "CP210x USB to UART VCP Driver Installation‚" on
page 5.
5.8. Analog I/O (TB1)
Several of the C8051F338 target device’s port pins are connected to the TB1 terminal block. Refer to Table 5 for
the TB1 terminal block connections.
5.9. IDAC Connector (J6)
The C8051F338 target board also features a Current-to-Voltage 1 K load resistor that may be connected to the
10-bit current-mode Digital-to-Analog Converter (IDAC) output that can be enabled on port pin (P0.1). Install a
shorting block on J6 to connect port pin P0.1 of the target device to the load resistor. If enabled by software, the
IDAC signal is then routed to the J1[2] and TB1[2] connectors.
5.10. C2 Pin Sharing
On the C8051F338, the debug pins C2CK and C2D are shared with the pins /RST and P2.4 respectively. The
target board includes the resistors necessary to enable pin sharing which allow the /RST and P2.4 pins to be used
normally while simultaneously debugging the device. See Application Note “AN124: Pin Sharing Techniques for the
C2 Interface” at www.silabs.com for more information regarding pin sharing.
Table 4. Serial Interface Header (J3) Description
Header Pins UART0 Pin Description
J3[5–6] TX_MCU (P0.4)
J3[7–8] RX_MCU (P0.5)
J3[9–10] RTS (P1.1)
J3[11–12] CTS (P1.2)
Table 5. TB1 Terminal Block Pin Descriptions
Pin # Description
1 P0.6 / CNVSTR
2IDAC
3P1.5
4P1.4
5 GND (Ground)
6 P0.0 / Vref (Voltage Reference)
C8051F336/7/8/9
12 Rev. 0.3
5.11. Target Board Pin Assignment Summary
Some GPIO pins of the C8051F338 MCU can have an alternate fixed function. For example, pin 22 on the 'F338
MCU is designated P0.4, and can be used as a GPIO pin. Also, if the UART0 peripheral on the MCU is enabled
using the crossbar registers, the TX signal is routed to this pin. This is shown in the "Alternate Fixed Function"
column. The "Target Board Function" column shows that this pin is used as TX on the 'F338 Target Board. The
"Relevant Headers" column shows that this signal is routed to pin 7 of the J1 header and pin 5 of the J3 header.
More details can be found in the C8051F336/7/8/9 data sheet. Some of the GPIO pins of the C8051F338 have
been used for various functions on the target board. Table 6 summarizes the MCU pin assignments on the target
board, and also shows the various headers associated with each signal.
Table 6. C8051F338 Target Board Pin Assignments and Headers
MCU Pin Name Pin# Primary
Function
Alternate Fixed
Function
Target Board
Function
Relevant Headers
P0.0 2 P0.0 VREF VREF J1[3], TB1[6]*, J5[1]
P0.1 1 P0.1 IDAC IDAC J1[4], J1[2]*, TB1[2], J6[1]
P0.2 24 P0.2 XTAL1 XTAL1 J1[5]*, J9[2]
P0.3 23 P0.3 XTAL2 XTAL2 J1[6]*, J10[2]
P0.4 22 P0.4 TX_MCU TX_MCU J1[7], J3[5]
P0.5 21 P0.5 RX_MCU RX_MCU J1[8], J3[7]
P0.6 20 P0.6 CNVSTR CNVSTR J1[9], TB1[1]
P0.7 19 P0.7 SW2 (switch) J1[10], J3[3]
P1.0 18 P1.0 CP0A J1[11], J11[1]
P1.1 17 P1.1 RTS J1[12], J3[9]
P1.2 16 P1.2 CTS J1[13], J3[11]
P1.3 15 P1.3 LED J1[14], J3[1]
P1.4 14 P1.4 AIN J1[15], TB1[4]
P1.5 13 P1.5 AIN J1[16], TB1[3]
P1.6 12 P1.6 POT J1[17], J8[1]
P1.7 11 P1.7 GPIO J1[18]
P2.0 10 P2.0 CP0+ J1[19], J11[3]
P2.1 9 P2.1 CP0- J1[20], J11[5]
P2.2 8 P2.2 GPIO J1[21]
P2.3 7 P2.3 T0 J1[22], J11[7]
P2.4/C2D 6 P2.4 C2D P2.4/C2D J1[23]*, J4[6]*, J4[4]
/RST/C2CK 5 /RST C2CK /RST/C2CK J1[24]*, J4[5]*, J4[7]
VDD 4 VDD VDD J2[2]
GND 3 GND GND J1[25], J1[26], TB1[5]
*Note: Headers denoted by this symbol are not directly connected to the MCU pin; the connection might be via one or more
headers and/or pin-sharing resistor(s). See board schematic for details.
P1-P3P4-P6P7-P9P10-P12P13-P15

C8051F336DK

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Silicon Labs
Description:
C8051F336 EVAL BRD
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