13
FN9056.11
September 29, 2015
Just after the PWM switching cycle begins and the charge
transfer from the bootstrap capacitor to the gate capacitance
is complete, the voltage on the bootstrap capacitor is at its
lowest point during the switching cycle. The charge lost on
the bootstrap capacitor will be equal to the charge
transferred to the equivalent gate-source capacitance of the
upper MOSFET as shown in Equation 19:
where Q
GATE
is the maximum total gate charge of the upper
MOSFET, C
BOOT
is the bootstrap capacitance, V
BOOT1
is
the bootstrap voltage immediately before turn-on, and
V
BOOT2
is the bootstrap voltage immediately after turn-on.
The bootstrap capacitor begins its refresh cycle when the gate
drive begins to turn-off the upper MOSFET. A refresh cycle
ends when the upper MOSFET is turned on again, which varies
depending on the switching frequency and duty cycle.
The minimum bootstrap capacitance can be calculated by
rearranging Equation 19 and solving for CBOOT in
Equation 20.
Typical gate charge values for MOSFETs considered in
these types of applications range from 20 to 100nC. Since
the voltage drop across Q
LOWER
is negligible, V
BOOT1
is
simply V
CPVOUT
- V
D
. A schottky diode is recommended to
minimize the voltage drop across the bootstrap capacitor
during the on-time of the upper MOSFET. Initial calculations
with V
BOOT2
no less than 4V will quickly help narrow the
bootstrap capacitor range.
For example, consider an upper MOSFET is chosen with a
maximum gate charge, Q
g
, of 100nC. Limiting the voltage
drop across the bootstrap capacitor to 1V results in a value
of no less than 0.1µF. The tolerance of the ceramic capacitor
should also be considered when selecting the final bootstrap
capacitance value.
A fast recovery diode is recommended when selecting a
bootstrap diode to reduce the impact of reverse recovery
charge loss. Otherwise, the recovery charge, Q
RR
, would
have to be added to the gate charge of the MOSFET and
taken into consideration when calculating the minimum
bootstrap capacitance.
ISL6527, ISL6527A DC/DC Converter
Application Circuit
Figure 8 shows an application circuit of a DC/DC Converter.
Detailed information on the circuit, including a complete
Bill-of-Materials and circuit board description, can be found
in Application Note AN1021.
http://www.intersil.com/data/an/an1021.pdf
ISL6527,
GND
LGATE
UGATE
PHASE
BOOT
VIN
NOTE:
NOTE:
V
G-S
V
CC
CBOOT
DBOOT
Q
UPPER
Q
LOWER
+
-
FIGURE 7. UPPER GATE DRIVE BOOTSTRAP
V
G-S
V
CC
-V
D
+
V
D
-
CPVOUT
ISL6527A
Q
GATE
C
BOOT
V
BOOT1
V
BOOT2
=
(EQ. 19)
C
BOOT
Q
GATE
V
BOOT1
V
BOOT2
-----------------------------------------------------
(EQ. 20)
ISL6527, ISL6527A
14
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN9056.11
September 29, 2015
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask
.
Reliability reports are also available from our website at www.intersil.com/support
Component Selection Notes:
C3, C8, C9 - Each 150mF, Panasonic EEF-UE0J151R or Equivalent.
D1 - 30mA Schottky Diode, MA732 or Equivalent
L1 - 1
µH Inductor, Panasonic P/N ETQ-P6F1ROSFA or Equivalent.
Q1- Fairchild MOSFET; ITF86110DK8.
2.5V @ 5A
FBCOMP
UGATE
PHASE
BOOT
GND
LGATE
ISL6527,
R3
R5
C10
C11
R2
L1
D1
C7
C1
C6
C8,9
OCSET/SD
CPVOUT
C3
R1
Q1
CT1
CT2
CPGND
VCC
3.3V
C2
C12
R4
GND
U1
GND
14
1
2
3
4
5
8
6
7
9
10
11
12
13
TP1
TP3
0.8V EXTERNAL REFERENCE
9.76k
6.49k
2.26k
124
0.1µF
1000pF
1µF
0.1F
33pF
5600pF
8200pF
C4
0.22µF
C5
10µF
CERAMIC
REF_IN
FIGURE 8. 3.3V TO 2.5V 5A DC/DC CONVERTER
ISL6527A
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision.
DATE REVISION CHANGE
September 29, 2015 FN9056.11 Updated Ordering Information Table on page 2.
Added Revision History and About Intersil sections.
Updated POD M14.15 from rev 0 to rev 1. Changes since rev 0: Added land pattern and moved
dimensions from table onto drawing
ISL6527, ISL6527A
15
FN9056.11
September 29, 2015
ISL6527, ISL6527A
Package Outline Drawing
L16.5x5B
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 2, 02/08
located within the zone indicated. The pin #1 identifier may be
Unless otherwise specified, tolerance : Decimal ± 0.05
Tiebar shown (if present) is a non-functional feature.
The configuration of the pin #1 identifier is optional, but must be
between 0.15mm and 0.30mm from the terminal tip.
Dimension b applies to the metallized terminal and is measured
Dimensions in ( ) for Reference Only.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
6.
either a mold or mark feature.
3.
5.
4.
2.
Dimensions are in millimeters.1.
NOTES:
BOTTOM VIEW
DETAIL "X"
SIDE VIEW
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
0.15(4X)
INDEX AREA
PIN 1
6
5.00
5.00
B
A
PIN #1 INDEX AREA
1613
4X
0.80
12X
2.4
6
4
3 . 10 ± 0 . 15
1
CBA0.10 M
0.33 +0.07 / -0.05
4
5
16X 0 . 60
8
9
12
1.00 MAX
BASE PLANE
SEATING PLANE
0.08
SEE DETAIL "X"
0.10
C
C
C
0 . 00 MIN.
0 . 05 MAX.
0 . 2 REFC
5
( 4 . 6 TYP )
( 3 . 10 )
( 16X 0 .33 )
( 16 X 0 . 8 )
( 12X 0 . 80 )
+0.15
-0.10

ISL6527ACBZA-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
IC REG CTRLR BUCK 14SOIC
Lifecycle:
New from this manufacturer.
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