December 1990 2
Philips Semiconductors Product specification
8-input multiplexer; 3-state 74HC/HCT251
FEATURES
• True and complement outputs
• Both outputs are 3-state for further multiplexer
expansion
• Multifunction capability
• Permits multiplexing from n-lines to one line
• Output capability: standard
• I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT251 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT251 are the logic implementations of
single-pole 8-position switches with the state of three
select inputs (S
0
,S
1
,S
2
) controlling the switch positions.
Assertion (Y) and negation (Y) outputs are both provided.
The output enable input (OE) is active LOW. The logic
function provided at the output, when activated, is:
Y=OE.(I
0
.S
0
.S
1
.S
2
+ I
1
.S
0
.S
1
.S
2
+
+ I
2
.S
0
.S
1
.S
2
+ I
3
.S
0
.S
1
.S
2
+
+ I
4
.S
0
.S
1
.S
2
+ I
5
.S
0
.S
1
.S
2
+
+ I
6
.S
0
.S
1
.S
2
+ I
7
.S
0
.S
1
.S
2
)
Both outputs are in the high impedance OFF-state (Z)
when the output enable input is HIGH, allowing multiplexer
expansion by tying the outputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25 °C; t
r
= t
f
= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in µW):
P
D
= C
PD
× V
CC
2
× f
i
+∑(C
L
× V
CC
2
× f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑ (C
L
× V
CC
2
× f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
− 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL PARAMETER CONDITIONS
TYPICAL
UNIT
HC HCT
t
PHL
/ t
PLH
propagation delay C
L
= 15 pF; V
CC
= 5 V
I
n
to Y 15 19 ns
I
n
to Y1719ns
S
n
to Y 20 20 ns
S
n
to Y2121ns
C
I
input capacitance 3.5 3.5 pF
C
PD
power dissipation capacitance per package notes 1 and 2 44 46 pF
