Data Sheet ADL5536
Rev. A | Page 11 of 16
BASIC CONNECTIONS
The basic connections for operating the ADL5536 are shown in
Figure 16. Recommended components are listed in Table 5. The
input and output should be ac-coupled with appropriately sized
capacitors (device characterization was performed with 0.1 μF
capacitors). A 5 V dc bias is supplied to the amplifier through
the bias inductor connected to RFOUT (Pin 3). The bias voltage
should be decoupled using a 1 µF capacitor, a 1.2 nF capacitor,
and a 68 pF capacitor.
RFIN
GND
GND
RFOUT
1
2
3
C6
1µF
L1
470nH
GND
RFOUT
C5
C4
C2
C1
VCC
RFIN
ADL5536
(2)
0.1µF
1.2nF
68pF
0.1µF
08673-015
Figure 16. Basic Connections
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Figure 17 shows the recommended land pattern for the ADL5536.
To minimize thermal impedance, the exposed paddle on the
package underside, along with Pin 2, should be soldered to a
ground plane. If multiple ground layers exist, they should be
stitched together using vias. For more information about land
pattern design and layout, refer to the AN-772 Application
Note, A Design and Manufacturing Guide for the Lead Frame
Chip Scale Package (LFCSP).
1.50mm
3.00mm
1.27mm
0.62mm
3.48mm
1.80mm
0.86mm
5.37mm
0.20mm
0.762mm
0.635mm
0.86mm
08673-101
Figure 17. Recommended Land Pattern
Table 5. Recommended Components for Basic Connections
Frequency C1 C2 L1 C4 C5 C6
20 MHz to 1000 MHz 0.1 µF 0.1 µF 470 nH (Coilcraft 0603LS-NX or equivalent) 68 pF 1.2 nF
1 µF
