NTLUS3A40PZTBG

© Semiconductor Components Industries, LLC, 2011
July, 2011 Rev. 3
1 Publication Order Number:
NTLUS3A40PZ/D
NTLUS3A40PZ
Power MOSFET
20 V, 9.4 A, mCoolt Single PChannel,
ESD, 2.0x2.0x0.55 mm UDFN Package
Features
UDFN Package with Exposed Drain Pads for Excellent Thermal
Conduction
Low Profile UDFN 2.0x2.0x0.55 mm for Board Space Saving
Lowest RDS(on) in 2.0x2.0 Package
ESD Protected
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
Applications
High Side Load Switch
PA Switch and Battery Switch
Optimized for Power Management Applications for Portable
Products, such as Cell Phones, PMP, DSC, GPS, and others
MAXIMUM RATINGS (T
J
= 25°C unless otherwise stated)
Parameter
Symbol Value Units
Drain-to-Source Voltage V
DSS
20 V
Gate-to-Source Voltage V
GS
±8.0 V
Continuous Drain
Current (Note 1)
Steady
State
T
A
= 25°C
I
D
6.4
A
T
A
= 85°C 4.6
t 5 s T
A
= 25°C 9.4
Power Dissipa-
tion (Note 1)
Steady
State
T
A
= 25°C
P
D
1.7
W
t 5 s T
A
= 25°C 3.8
Continuous Drain
Current (Note 2)
Steady
State
T
A
= 25°C
I
D
4.0
A
T
A
= 85°C 2.9
Power Dissipation (Note 2) T
A
= 25°C P
D
0.7 W
Pulsed Drain Current
tp = 10 ms
I
DM
30 A
Operating Junction and Storage
Temperature
T
J
,
T
STG
-55 to
150
°C
Source Current (Body Diode) (Note 2) I
S
1.0 A
Lead Temperature for Soldering Purposes
(1/8 from case for 10 s)
T
L
260 °C
ESD Rating (HBM) per JESD22A114F ESD >2000 V
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces).
2. Surface-mounted on FR4 board using the minimum recommended pad size
of 30 mm
2
, 2 oz. Cu.
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G
S
PChannel MOSFET
D
20 V
39 mW @ 2.5 V
29 mW @ 4.5 V
R
DS(on)
MAX I
D
MAXV
(BR)DSS
MOSFET
UDFN6
CASE 517BG
mCOOLt
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
AA = Specific Device Code
M = Date Code
G = PbFree Package
AA MG
G
1
60 mW @ 1.8 V
MARKING
DIAGRAM
120 mW @ 1.5 V
(Top View)
(Note: Microdot may be in either location)
1
6
9.4 A
NTLUS3A40PZ
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2
THERMAL RESISTANCE RATINGS
Parameter
Symbol Max Units
Junction-to-Ambient – Steady State (Note 3)
R
θJA
72
°C/W
Junction-to-Ambient – t 5 s (Note 3)
R
θJA
33
Junction-to-Ambient – Steady State min Pad (Note 4)
R
θJA
189
ELECTRICAL CHARACTERISTICS (T
J
= 25°C unless otherwise specified)
Parameter
Symbol Test Condition Min Typ Max Units
OFF CHARACTERISTICS
Drain-to-Source Breakdown Voltage
V
(BR)DSS
V
GS
= 0 V, I
D
= 250 mA
20 V
Drain-to-Source Breakdown Voltage
Temperature Coefficient
V
(BR)DSS
/T
J
I
D
= 250 mA, ref to 25°C
5.0 mV/°C
Zero Gate Voltage Drain Current I
DSS
V
GS
= 0 V,
V
DS
= 20 V
T
J
= 25°C 1.0
mA
T
J
= 85°C 10
Gate-to-Source Leakage Current I
GSS
V
DS
= 0 V, V
GS
= ±8.0 V ±10
mA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
V
GS(TH)
V
GS
= V
DS
, I
D
= 250 mA
0.4 1.0 V
Negative Threshold Temp. Coefficient V
GS(TH)
/T
J
3.0 mV/°C
Drain-to-Source On Resistance R
DS(on)
V
GS
= 4.5 V, I
D
= 6.4 A 23 29
mW
V
GS
= 2.5 V, I
D
= 4.8 A 31 39
V
GS
= 1.8 V, I
D
= 2.5 A 43 60
V
GS
= 1.5 V, I
D
= 1.5 A 60 120
Forward Transconductance g
FS
V
DS
= 15 V, I
D
= 4.0 A 18 S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
ISS
V
GS
= 0 V, f = 1 MHz,
V
DS
= 15 V
2600
pF
Output Capacitance C
OSS
200
Reverse Transfer Capacitance C
RSS
190
Total Gate Charge Q
G(TOT)
V
GS
= 4.5 V, V
DS
= 15 V;
I
D
= 4.0 A
29
nC
Threshold Gate Charge Q
G(TH)
1.4
Gate-to-Source Charge Q
GS
3.7
Gate-to-Drain Charge Q
GD
8.1
SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 6)
Turn-On Delay Time
t
d(ON)
V
GS
= 4.5 V, V
DD
= 15 V,
I
D
= 4.0 A, R
G
= 1 W
9.0
ns
Rise Time t
r
18
Turn-Off Delay Time t
d(OFF)
126
Fall Time t
f
71
DRAIN-SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
V
GS
= 0 V,
I
S
= 1.0 A
T
J
= 25°C 0.65 1.0
V
T
J
= 125°C 0.55
Reverse Recovery Time t
RR
V
GS
= 0 V, dis/dt = 100 A/ms,
I
S
= 1.0 A
25
ns
Charge Time t
a
10
Discharge Time t
b
15
Reverse Recovery Charge Q
RR
13.6 nC
3. Surface-mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).
4. Surface-mounted on FR4 board using the minimum recommended pad size of 30 mm
2
, 2 oz. Cu.
5. Pulse Test: pulse width 300 ms, duty cycle 2%.
6. Switching characteristics are independent of operating junction temperatures.
NTLUS3A40PZ
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3
TYPICAL CHARACTERISTICS
Figure 1. OnRegion Characteristics Figure 2. Transfer Characteristics
V
DS
, DRAINTOSOURCE VOLTAGE (V) V
GS
, GATETOSOURCE VOLTAGE (V)
4.03.53.02.01.51.00.50
0
2
4
6
10
14
18
20
2.5 3.02.01.51.00.50
0
2
4
8
10
12
18
20
Figure 3. OnResistance vs. GatetoSource
Voltage
Figure 4. OnResistance vs. Drain Current and
Gate Voltage
V
GS
, GATE VOLTAGE (V) I
D
, DRAIN CURRENT (A)
4.03.5 4.53.02.52.01.51.0
0.00
0.02
0.04
0.06
0.08
0.12
0.14
0.16
16141286420
0.020
0.030
0.040
0.060
0.070
Figure 5. OnResistance Variation with
Temperature
Figure 6. DraintoSource Leakage Current
vs. Voltage
T
J
, JUNCTION TEMPERATURE (°C) V
DS
, DRAINTOSOURCE VOLTAGE (V)
12510075502502550
0.7
0.8
0.9
1.1
1.2
1.3
1.4
1.6
20141062
100
1000
10,000
100,000
I
D
, DRAIN CURRENT (A)
I
D
, DRAIN CURRENT (A)
R
DS(on)
, DRAINTOSOURCE RESISTANCE (W)
R
DS(on)
, NORMALIZED DRAINTO
SOURCE RESISTANCE (W)
I
DSS
, LEAKAGE (nA)
2.5 4.5
8
12
16
V
GS
= 4.5 V
4.0 V
3.5 V
3.0 V
2.5 V
2.0 V
1.8 V
1.6 V
V
DS
10 V
6
14
16
T
J
= 25°C
T
J
= 55°C
T
J
= 125°C
0.10
I
D
= 4.0 A
T
J
= 25°C
10 18 20
R
DS(on)
, DRAINTOSOURCE RESISTANCE (W)
0.050
1.5 V
T
J
= 25°C
1.8 V
2.5 V
V
GS
= 4.5 V
V
GS
= 4.5 V
I
D
= 4.0 A
150
1.0
1.5
T
J
= 85°C
T
J
= 125°C
0.18
0.20
0.080
18128416

NTLUS3A40PZTBG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IGBT Transistors T4 20/8 PCH UDFN SING
Lifecycle:
New from this manufacturer.
Delivery:
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