74F161A, 74F163A Synchronous Presettable Binary Counter
©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74F161A, 74F163A Rev. 1.0.2 7
AC Electrical Characteristics
AC Operating Requirements
Symbol Parameter
T
A
=
+25°C,
V
CC
=
+5.0V,
C
L
=
50pF
T
A
=
–55°C to +125°C,
V
CC
=
+5.0V,
C
L
=
50pF
T
A
=
0°C to 70°C,
V
CC
=
+5.0V,
C
L
=
50pF
UnitsMin. Typ. Max. Min. Max. Min. Max.
f
MAX
Maximum Count Frequency 100 MHz
t
PLH
Propagation Delay,
CP to Q
n
(PE Input HIGH)
3.5 5.5 7.5 3.5 9.0 3.5 8.5 ns
t
PHL
3.5 7.5 10.0 3.5 11.5 3.5 11.0
t
PLH
Propagation Delay,
CP to Q
n
(PE Input LOW)
4.0 6.0 8.5 4.0 10.0 4.0 9.5 ns
t
PHL
4.0 6.0 8.5 4.0 10.0 4.0 9.5
t
PLH
Propagation Delay,
CP to TC
5.0 10.0 14.0 5.0 16.5 5.0 15.0 ns
t
PHL
5.0 10.0 14.0 5.0 15.5 5.0 15.0
t
PLH
Propagation Delay,
CET to TC
2.5 4.5 7.5 2.5 9.0 2.5 8.5 ns
t
PHL
2.5 4.5 7.5 2.5 9.0 2.5 8.5
t
PHL
Propagation Delay,
MR
to Q
n
(74F161A)
5.5 9.0 12.0 5.5 14.0 5.5 13.0 ns
t
PHL
Propagation Delay,
MR
to TC (74F161A)
4.5 8.0 10.5 4.5 12.5 4.5 11.5 ns
Symbol Parameter
T
A
= +25°C,
V
CC
= +5.0V
T
A
= –55°C to +125°C,
V
CC
= +5.0V
T
A
= 0°C to 70°C,
V
CC
= +5.0V
UnitsMin. Max. Min. Max. Min. Max.
t
S
(H) Setup Time, HIGH or LOW,
P
n
to CP
5.0 5.5 5.0 ns
t
S
(L)
5.0 5.5 5.0
t
H
(H) Hold Time, HIGH or LOW,
P
n
to CP
2.0 2.5 2.0 ns
t
H
(L)
2.0 2.5 2.0
t
S
(H) Setup Time, HIGH or LOW,
PE
or SR to CP
11.0 13.5 11.5 ns
t
S
(L)
8.5 10.5 9.5
t
H
(H) Hold Time, HIGH or LOW,
PE
or SR to CP
2.0 3.6 2.0 ns
t
H
(L)
00 0
t
S
(H) Setup Time, HIGH or LOW,
CEP or CET to CP
11.0 13.0 11.5 ns
t
S
(L)
5.0 6.0 5.0
t
H
(H) Hold Time, HIGH or LOW,
CEP or CET to CP
00 0ns
t
H
(L)
00 0
t
W
(H) Clock Pulse Width (Load),
HIGH or LOW
5.0 5.0 5.0 ns
t
W
(L)
5.0 5.0 5.0
t
W
(H) Clock Pulse Width (Count),
HIGH or LOW
4.0 5.0 4.0 ns
t
W
(L)
6.0 8.0 7.0
t
W
(L) MR Pulse Width, LOW
(74F161A)
5.0 5.0 5.0 ns
t
REC
Recovery Time, MR to CP
(74F161A)
6.0 6.0 6.0 ns
