BD6040GUL, BD6041GUL
Technical Note
10/13
C: In case of EN pin is connected.
Fig. 23
D: In case of both EN & OK pins are not connected.
Fig. 24
BD6040
BD6041
IN OUT
PMIC
/ charge
r
A
dapte
r
/ USB
GND
OK
OUT
OUT
EN
IN
IN
GND
IN
IN
1 2 3
C
B
A
OK
OUT
OUT
EN
IN
IN
GND
IN
IN
123
C
B
A
o
r
GND
Short
Open
OK
EN
1.0µF
0.1µF
Li-ion
1 cell
OK
OUT
OUT
EN
IN
IN
GND
IN
IN
1 2 3
C
B
A
o
r
GND Short
BD6040
BD6041
IN OUT
OK
CPU
EN
PMIC
/
charge
r
A
dapte
r
/ USB
GND
OK
OUT
OUT
EN
IN
IN
GND
IN
IN
123
C
B
A
Open
1 .0 µF 0.1µF
Li -ion
1 cell
BD6040GUL, BD6041GUL
Technical Note
11/13
Notes foer use
(1) Absolute maximum ratings
If applied voltage (VDD, VIN), operating temperature range (Topr), or other absolute maximum ratings are exceeded, there
is a risk of damage. Since it is not possible to identify short, open, or other damage modes, if special modes in which
absolute maximum ratings are exceeded are assumed, consider applying fuses or other physical safety measures.
(2) Recommended operating range
This is the range within which it is possible to obtain roughly the expected characteristics. For electrical characteristics, it
is those that are guaranteed under the conditions for each parameter. Even when these are within the recommended
operating range, voltage and temperature characteristics are indicated.
(3) Reverse connection of power supply connector
There is a risk of damaging the LSI by reverse connection of the power supply connector. For protection from reverse
connection, take measures such as externally placing a diode between the power supply and the power supply pin of the LSI.
(4) Power supply lines
In the design of the board pattern, make power supply and GND line wiring low impedance.
When doing so, although the digital power supply and analog power supply are the same potential, separate the digital
power supply pattern and analog power supply pattern to deter digital noise from entering the analog power supply due to
the common impedance of the wiring patterns. Similarly take pattern design into account for GND lines as well.
Furthermore, for all power supply pins of the LSI, in conjunction with inserting capacitors between power supply and GND
pins, when using electrolytic capacitors, determine constants upon adequately confirming that capacitance loss occurring
at low temperatures is not a problem for various characteristics of the capacitors used.
(5) GND voltage
Make the potential of a GND pin such that it will be the lowest potential even if operating below that. In addition, confirm
that there are no pins for which the potential becomes less than a GND by actually including transition phenomena.
(6) Shorts between pins and misinstallation
When installing in the set board, pay adequate attention to orientation and placement discrepancies of the LSI. If it is
installed erroneously, there is a risk of LSI damage. There also is a risk of damage if it is shorted by a foreign substance
getting between pins or between a pin and a power supply or GND.
(7) Operation in strong magnetic fields
Be careful when using the LSI in a strong magnetic field, since it may malfunction.
(8) Inspection in set board
When inspecting the LSI in the set board, since there is a risk of stress to the LSI when capacitors are connected to low
impedance LSI pins, be sure to discharge for each process. Moreover, when getting it on and off of a jig in the inspection
process, always connect it after turning off the power supply, perform the inspection, and remove it after turning off the
power supply. Furthermore, as countermeasures against static electricity, use grounding in the assembly process and
take appropriate care in transport and storage.
(9) Input pins
Parasitic elements inevitably are formed on an LSI structure due to potential relationships. Because parasitic elements
operate, they give rise to interference with circuit operation and may be the cause of malfunctions as well as damage.
Accordingly, take care not to apply a lower voltage than GND to an input pin or use the LSI in other ways such that
parasitic elements operate. Moreover, do not apply a voltage to an input pin when the power supply voltage is not being
applied to the LSI. Furthermore, when the power supply voltage is being applied, make each input pin a voltage less than
the power supply voltage as well as within the guaranteed values of electrical characteristics.
(10) Ground wiring pattern
When there is a small signal GND and a large current GND, it is recommended that you separate the large current GND
pattern and small signal GND pattern and provide single point grounding at the reference point of the set so that voltage
variation due to resistance components of the pattern wiring and large currents do not cause the small signal GND voltage
to change. Take care that the GND wiring pattern of externally attached components also does not change.
(11) Externally attached capacitors
When using ceramic capacitors for externally attached capacitors, determine constants upon taking into account a
lowering of the rated capacitance due to DC bias and capacitance change due to factors such as temperature.
(12) Thermal shutdown circuit (TSD)
When junction temperatures become 170°C (typ) or higher, the thermal shutdown circuit operates and turns a switch OFF.
The thermal shutdown circuit, which is aime
d
at isolating the LSI from thermal runaway as much as possible, is not aimed
at the protection or guarantee of the LSI. Therefore, do not continuously use the LSI with this circuit operating or use the
LSI assuming its operation.
(13) Thermal design
Perform thermal design in which there are adequate margins by taking into account the permissible dissipation (Pd) in
actual states of use.
BD6040GUL, BD6041GUL
Technical Note
12/13
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150
Ambient temperature
: Ta [°C]
Power dissipation : Pd [W]
Pd=0.725W
Ta_max=85°C
-5.8mW/°C
Power Dissipation
On the ROHM’s specification Board
Fig. 25 Power dissipation vs. Ta

BD6040GUL-E2

Mfr. #:
Manufacturer:
Description:
Power Management Specialized - PMIC 30V Resistance 6.4V OVLO
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