DS2250(T)
3 of 18
PIN DESCRIPTION
PIN DESCRIPTION
1, 3, 5, 7, 9,
11, 13, 15
P1.0 - P1.7. General purpose I/O Port 1
17
RST - Active high reset input. A logic 1 applied to this pin will activate a reset state.
This pin is pulled down internally so this pin can be left unconnected if not used. An
RC power-on reset circuit is not needed and is not recommended.
19
P3.0 RXD. General purpose I/O port pin 3.0. Also serves as the receive signal for the
on board UART. This pin should not be connected directly to a PC COM port.
21
P3.1 TXD. General purpose I/O port pin 3.1. Also serves as the transmit signal for the
on board UART. This pin should not be connected directly to a PC COM port.
23
P3.2 INT0 . General purpose I/O port pin 3.2. Also serves as the active low External
Interrupt 0.
25
P3.3 INT1 . General purpose I/O port pin 3.3. Also serves as the active low External
Interrupt 1.
27 P3.4 T0. General purpose I/O port pin 3.4. Also serves as the Timer 0 input.
29 P3.5 T1. General purpose I/O port pin 3.5. Also serves as the Timer 1 input.
31
P3.6 WR . General purpose I/O port pin. Also serves as the write strobe for Expanded
bus operation.
33
P3.7 RD . General purpose I/O port pin. Also serves as the read strobe for Expanded
bus operation.
35, 37
XTAL2, XTAL1. Used to connect an external crystal to the internal oscillator.
XTAL1 is the input to an inverting amplifier and XTAL2 is the output.
39 GND - Logic ground.
26, 28, 30, 32,
34, 36, 38, 40
P2.7-P2.0. General purpose I/O Port 2. Also serves as the MSB of the Expanded
Address bus.
24
PSEN - Program Store Enable. This active low signal is used to enable an external
program memory when using the Expanded bus. It is normally an output and should
be unconnected if not used.
PSEN also is used to invoke the Bootstrap Loader. At this
time, PSEN will be pulled down externally. This should only be done once the
DS2250(T) is already in a reset state. The device that pulls down should be open-drain
since it must not interfere with PSEN under normal operation.
22
ALE - Address Latch Enable. Used to de-multiplex the multiplexed Expanded
Address/Data bus on Port 0. This pin is normally connected to the clock input on a
’373 type transparent latch. When using a parallel programmer, this pin also assumes
the PROG function for programming pulses.
20
EA - External Access. This pin forces the DS2250(T) to behave like an 8031. No
internal memory (or clock) will be available when this pin is at a logic low. Since this
pin is pulled down internally, it should be connected to +5V to use NV RAM. In a
parallel programmer, this pin also serves as V
PP
for super voltage pulses.
4, 6, 8, 10, 12,
14, 16, 18
P0.0-P0.7. General purpose I/O Port 0. This port is open-drain and can not drive a
logic 1. It requires external pullups. Port 0 is also the multiplexed Expanded
Address/Data bus. When used in this mode, it does not require pullups.
2 V
CC
+ - 5 volts.
