DS2250(T)
4 of 18
INSTRUCTION SET
The DS2250(T) executes an instruction set which is object code-compatible with the industry standard
8051 microcontroller. As a result, software development packages which have been written for the 8051
are compatible with the DS2250(T), including cross-assemblers, high-level language compilers, and
debugging tools. Note that the DS2250(T) is functionally identical to the DS5000(T) except for package
and the 64k memory option.
A complete description for the DS2250(T) instruction set is available in the Secure Microcontroller
User’s Guide.
MEMORY ORGANIZATION
Figure 2 illustrates the address spaces which are accessed by the DS2250(T). As illustrated in the figure,
separate address spaces exist for program and data memory. Since the basic addressing capability of the
machine is 16 bits, a maximum of 64 kbytes of program memory and 64 kbytes of data memory can be
accessed by the DS2250(T) CPU. The 8- or 32-kbyte RAM area inside of the DS2250(T) can be used to
contain both program and data memory. A second 32k RAM is available for data only.
The Real Time Clock (RTC) in the DS2250(T) is reached in the memory map by setting a SFR bit. The
MCON.2 bit (ECE2) is used to select an alternate data memory map. While ECE2=1, all MOVXs will be
routed to this alternate memory map. The real time clock is a serial device that resides in this area. A full
description of the RTC access and example software is given in the Secure Microcontroller User’s Guide.
DS2250(T) MEMORY MAP Figure 2
DATA MEMORY (MOVX)
DS2250(T)
5 of 18
PROGRAM LOADING
The Program Load Modes allow initialization of the NV RAM Program/Data Memory. This initialization
may be performed in one of two ways:
1. Serial Program Loading which is capable of performing Bootstrap Loading of the DS2250(T). This
feature allows the loading of the application program to be delayed until the DS2250(T) is installed in
the end system.
2. Parallel Program Load cycles which perform the initial loading from parallel address/data information
presented on the I/O port pins. This mode is timing set-compatible with the 87C51H microcontroller
programming mode.
The DS2250(T) is placed in its Program Load configuration by simultaneously applying a logic 1 to the
RST pin and forcing the PSEN line to a logic 0 level. Immediately following this action, the DS2250(T)
will look for a parallel Program Load pulse, or a serial ASCII carriage return (0DH) character received at
9600, 2400, 1200, or 300 bps over the serial port.
The hardware configurations used to select these modes of operation are illustrated in Figure 3.
PROGRAM LOADING CONFIGURATIONS Figure 3
DS2250(T)
6 of 18
SERIAL BOOTSTRAP LOADER
The Serial Program Load Mode is the easiest, fastest, most reliable, and most complete method of
initially loading application software into the DS2250(T) nonvolatile RAM. Communication can be
performed over a standard asynchronous serial communications port. A typical application would use a
simple RS232C serial interface to program the DS2250(T) as a final production procedure. The hardware
configuration which is required for the Serial Program Load Mode is illustrated in Figure 3. Port pins 2.7
and 2.6 must be either open or pulled high to avoid placing the device in a parallel load cycle. Although
an 11.0592 MHz crystal is shown in Figure 3, a variety of crystal frequencies and loader baud rates are
supported, shown in Table 2. The serial loader is designed to operate across a 3-wire interface from a
standard UART. The receive, transmit, and ground wires are all that are necessary to establish
communication with the DS2250(T).
The Serial Bootstrap Loader implements an easy-to-use command line interface which allows an
application program in an Intel hex representation to be loaded into and read back from the device. Intel
hex is the typical format which existing 8051 cross-assemblers output. The serial loader responds to
single character commands which are summarized below:
COMMAND FUNCTION
C Return CRC-16 checksum of embedded RAM
D Dump Intel hex File
F Fill embedded RAM block with constant
K Load 40-bit encryption key
L Load Intel hex file
R Read MCON register
T Trace (Echo) incoming Intel hex data
U Clear Security Lock
V Verify Embedded RAM with incoming Intel hex
W Write MCON register
Z Set security lock
P Put a value to a port
G Get a value from a port
Table 1 summarizes the selection of the available Parallel Program Load cycles. The timing associated
with these cycles is illustrated in the electrical specs.
PARALLEL PROGRAM LOAD CYCLES Table 1
MODE RST
PSEN PROG EA
P2.7 P2.6 P2.5
Program 1 0 0 V
PP
1 0 X
Security Set 1 0 0 V
PP
1 1 X
Verify 1 X X 1 0 0 X
Prog Expanded 1 0 0 V
PP
0 1 0
Verify Expanded 1 0 1 1 0 1 0
Prog MCON or Key registers 1 0 0 V
PP
0 1 1
Verify MCON registers 1 0 1 1 0 1 1

DS2250T-64-16+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
System-On-Modules - SOM Soft MCU Module
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet